Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6688696 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
56876 |
| auto[1] |
4600321 |
1 |
|
|
T33 |
49809 |
|
T34 |
55 |
|
T1 |
17 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10692602 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
100908 |
| auto[1] |
596415 |
1 |
|
|
T33 |
5777 |
|
T34 |
1 |
|
T12 |
227 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6666586 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
59135 |
| auto[1] |
4622431 |
1 |
|
|
T33 |
47550 |
|
T34 |
20 |
|
T1 |
9 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2021746 |
1 |
|
|
T33 |
19803 |
|
T34 |
3 |
|
T1 |
9 |
| auto[1] |
auto[0] |
auto[1] |
300373 |
1 |
|
|
T33 |
2732 |
|
T12 |
104 |
|
T15 |
67 |
| auto[1] |
auto[1] |
auto[0] |
2004270 |
1 |
|
|
T33 |
21970 |
|
T34 |
16 |
|
T12 |
499 |
| auto[1] |
auto[1] |
auto[1] |
296042 |
1 |
|
|
T33 |
3045 |
|
T34 |
1 |
|
T12 |
123 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |