Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6715981 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
55945 |
| auto[1] |
4573036 |
1 |
|
|
T33 |
50740 |
|
T34 |
29 |
|
T1 |
25 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9365867 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
76589 |
| auto[1] |
1923150 |
1 |
|
|
T33 |
30096 |
|
T34 |
10 |
|
T1 |
25 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6674841 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58134 |
| auto[1] |
4614176 |
1 |
|
|
T33 |
48551 |
|
T34 |
19 |
|
T1 |
37 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1356548 |
1 |
|
|
T33 |
9046 |
|
T34 |
4 |
|
T1 |
6 |
| auto[1] |
auto[0] |
auto[1] |
966039 |
1 |
|
|
T33 |
14659 |
|
T34 |
7 |
|
T1 |
18 |
| auto[1] |
auto[1] |
auto[0] |
1334478 |
1 |
|
|
T33 |
9409 |
|
T34 |
5 |
|
T1 |
6 |
| auto[1] |
auto[1] |
auto[1] |
957111 |
1 |
|
|
T33 |
15437 |
|
T34 |
3 |
|
T1 |
7 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |