Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6700684 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58455 |
| auto[1] |
4588333 |
1 |
|
|
T33 |
48230 |
|
T34 |
42 |
|
T12 |
1952 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9369986 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
75086 |
| auto[1] |
1919031 |
1 |
|
|
T33 |
31599 |
|
T34 |
8 |
|
T1 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6694326 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
56081 |
| auto[1] |
4594691 |
1 |
|
|
T33 |
50604 |
|
T34 |
24 |
|
T1 |
21 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1340164 |
1 |
|
|
T33 |
9371 |
|
T34 |
15 |
|
T1 |
20 |
| auto[1] |
auto[0] |
auto[1] |
962731 |
1 |
|
|
T33 |
15738 |
|
T34 |
2 |
|
T1 |
1 |
| auto[1] |
auto[1] |
auto[0] |
1335496 |
1 |
|
|
T33 |
9634 |
|
T34 |
1 |
|
T12 |
346 |
| auto[1] |
auto[1] |
auto[1] |
956300 |
1 |
|
|
T33 |
15861 |
|
T34 |
6 |
|
T12 |
360 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |