Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6670773 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58875 |
| auto[1] |
4618244 |
1 |
|
|
T33 |
47810 |
|
T34 |
32 |
|
T1 |
5 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10699341 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
100427 |
| auto[1] |
589676 |
1 |
|
|
T33 |
6258 |
|
T34 |
2 |
|
T12 |
319 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6704507 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
56150 |
| auto[1] |
4584510 |
1 |
|
|
T33 |
50535 |
|
T34 |
40 |
|
T1 |
34 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1993911 |
1 |
|
|
T33 |
22839 |
|
T34 |
22 |
|
T1 |
34 |
| auto[1] |
auto[0] |
auto[1] |
294831 |
1 |
|
|
T33 |
3245 |
|
T34 |
1 |
|
T12 |
125 |
| auto[1] |
auto[1] |
auto[0] |
2000923 |
1 |
|
|
T33 |
21438 |
|
T34 |
16 |
|
T12 |
767 |
| auto[1] |
auto[1] |
auto[1] |
294845 |
1 |
|
|
T33 |
3013 |
|
T34 |
1 |
|
T12 |
194 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |