Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6676150 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58332 |
| auto[1] |
4612867 |
1 |
|
|
T33 |
48353 |
|
T34 |
46 |
|
T1 |
19 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10694851 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
100980 |
| auto[1] |
594166 |
1 |
|
|
T33 |
5705 |
|
T1 |
2 |
|
T12 |
272 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6681507 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58821 |
| auto[1] |
4607510 |
1 |
|
|
T33 |
47864 |
|
T34 |
20 |
|
T1 |
25 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2012337 |
1 |
|
|
T33 |
22013 |
|
T34 |
7 |
|
T1 |
21 |
| auto[1] |
auto[0] |
auto[1] |
297767 |
1 |
|
|
T33 |
3024 |
|
T1 |
2 |
|
T12 |
146 |
| auto[1] |
auto[1] |
auto[0] |
2001007 |
1 |
|
|
T33 |
20146 |
|
T34 |
13 |
|
T1 |
2 |
| auto[1] |
auto[1] |
auto[1] |
296399 |
1 |
|
|
T33 |
2681 |
|
T12 |
126 |
|
T15 |
126 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |