Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6706859 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58918 |
| auto[1] |
4582158 |
1 |
|
|
T33 |
47767 |
|
T34 |
40 |
|
T1 |
24 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10700967 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
101117 |
| auto[1] |
588050 |
1 |
|
|
T33 |
5568 |
|
T1 |
1 |
|
T12 |
332 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6713197 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
60371 |
| auto[1] |
4575820 |
1 |
|
|
T33 |
46314 |
|
T34 |
13 |
|
T1 |
26 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2000736 |
1 |
|
|
T33 |
20846 |
|
T34 |
3 |
|
T1 |
11 |
| auto[1] |
auto[0] |
auto[1] |
295661 |
1 |
|
|
T33 |
2874 |
|
T12 |
211 |
|
T15 |
114 |
| auto[1] |
auto[1] |
auto[0] |
1987034 |
1 |
|
|
T33 |
19900 |
|
T34 |
10 |
|
T1 |
14 |
| auto[1] |
auto[1] |
auto[1] |
292389 |
1 |
|
|
T33 |
2694 |
|
T1 |
1 |
|
T12 |
121 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |