Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6692176 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
60539 |
| auto[1] |
4596841 |
1 |
|
|
T33 |
46146 |
|
T34 |
39 |
|
T1 |
19 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10695749 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
100794 |
| auto[1] |
593268 |
1 |
|
|
T33 |
5891 |
|
T34 |
1 |
|
T12 |
288 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6676935 |
1 |
|
|
T31 |
39638 |
|
T32 |
45766 |
|
T33 |
58333 |
| auto[1] |
4612082 |
1 |
|
|
T33 |
48352 |
|
T34 |
31 |
|
T1 |
13 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2024844 |
1 |
|
|
T33 |
22042 |
|
T34 |
25 |
|
T1 |
7 |
| auto[1] |
auto[0] |
auto[1] |
299885 |
1 |
|
|
T33 |
3162 |
|
T34 |
1 |
|
T12 |
145 |
| auto[1] |
auto[1] |
auto[0] |
1993970 |
1 |
|
|
T33 |
20419 |
|
T34 |
5 |
|
T1 |
6 |
| auto[1] |
auto[1] |
auto[1] |
293383 |
1 |
|
|
T33 |
2729 |
|
T12 |
143 |
|
T15 |
83 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |