cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62272 |
1 |
|
|
T34 |
1327 |
|
T50 |
233 |
|
T90 |
1644 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50258 |
1 |
|
|
T34 |
980 |
|
T50 |
315 |
|
T90 |
717 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61035 |
1 |
|
|
T34 |
2167 |
|
T50 |
1388 |
|
T90 |
985 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40995 |
1 |
|
|
T34 |
850 |
|
T50 |
227 |
|
T90 |
426 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T34 |
36 |
|
T50 |
13 |
|
T90 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T34 |
33 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T34 |
33 |
|
T50 |
13 |
|
T90 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T34 |
32 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T34 |
33 |
|
T50 |
13 |
|
T90 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T34 |
31 |
|
T50 |
7 |
|
T90 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T34 |
31 |
|
T50 |
7 |
|
T90 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T34 |
31 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T34 |
30 |
|
T50 |
6 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T34 |
31 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T34 |
30 |
|
T50 |
6 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
30 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T34 |
29 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T34 |
30 |
|
T50 |
13 |
|
T90 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T34 |
30 |
|
T50 |
12 |
|
T90 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T34 |
27 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
28 |
|
T50 |
12 |
|
T90 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T34 |
26 |
|
T50 |
12 |
|
T90 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T34 |
26 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T34 |
25 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57487 |
1 |
|
|
T34 |
1440 |
|
T50 |
1447 |
|
T90 |
803 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49626 |
1 |
|
|
T34 |
949 |
|
T50 |
281 |
|
T90 |
1324 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59122 |
1 |
|
|
T34 |
1119 |
|
T50 |
232 |
|
T90 |
929 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48529 |
1 |
|
|
T34 |
1730 |
|
T50 |
211 |
|
T90 |
621 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1783 |
1 |
|
|
T34 |
41 |
|
T50 |
12 |
|
T90 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T34 |
45 |
|
T50 |
12 |
|
T90 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T34 |
45 |
|
T50 |
12 |
|
T90 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T34 |
45 |
|
T50 |
12 |
|
T90 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T34 |
36 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T34 |
33 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T34 |
31 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T34 |
41 |
|
T50 |
12 |
|
T90 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T34 |
29 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T34 |
27 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T34 |
33 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T34 |
27 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T34 |
33 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T34 |
25 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T34 |
33 |
|
T50 |
9 |
|
T90 |
25 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61621 |
1 |
|
|
T34 |
995 |
|
T50 |
1336 |
|
T90 |
781 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45224 |
1 |
|
|
T34 |
2360 |
|
T50 |
242 |
|
T90 |
895 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61327 |
1 |
|
|
T34 |
1129 |
|
T50 |
573 |
|
T90 |
1340 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47314 |
1 |
|
|
T34 |
808 |
|
T50 |
123 |
|
T90 |
702 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T34 |
44 |
|
T50 |
7 |
|
T90 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T34 |
43 |
|
T50 |
7 |
|
T90 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T34 |
42 |
|
T50 |
9 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T34 |
38 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T34 |
38 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T34 |
38 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T34 |
37 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
40 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T34 |
37 |
|
T50 |
6 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T34 |
36 |
|
T50 |
5 |
|
T90 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T34 |
38 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T34 |
34 |
|
T50 |
5 |
|
T90 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T34 |
29 |
|
T50 |
5 |
|
T90 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T34 |
29 |
|
T50 |
5 |
|
T90 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T34 |
36 |
|
T50 |
8 |
|
T90 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T34 |
35 |
|
T50 |
8 |
|
T90 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T34 |
27 |
|
T50 |
5 |
|
T90 |
27 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62545 |
1 |
|
|
T34 |
1176 |
|
T50 |
1477 |
|
T90 |
881 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46844 |
1 |
|
|
T34 |
709 |
|
T50 |
280 |
|
T90 |
857 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60086 |
1 |
|
|
T34 |
1639 |
|
T50 |
193 |
|
T90 |
532 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46577 |
1 |
|
|
T34 |
1790 |
|
T50 |
177 |
|
T90 |
1403 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
25 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T34 |
33 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1739 |
1 |
|
|
T34 |
32 |
|
T50 |
15 |
|
T90 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
25 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T34 |
33 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
25 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T34 |
32 |
|
T50 |
12 |
|
T90 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
25 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T34 |
31 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T34 |
32 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T34 |
31 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T34 |
31 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T34 |
32 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T34 |
28 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T34 |
31 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T34 |
28 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
27 |
|
T50 |
9 |
|
T90 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T34 |
26 |
|
T50 |
9 |
|
T90 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T34 |
27 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T34 |
25 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T34 |
26 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T34 |
25 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T34 |
26 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T34 |
24 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T34 |
26 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
24 |
|
T50 |
7 |
|
T90 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T34 |
22 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T34 |
26 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T34 |
25 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59299 |
1 |
|
|
T34 |
1726 |
|
T50 |
359 |
|
T90 |
679 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47545 |
1 |
|
|
T34 |
1467 |
|
T50 |
218 |
|
T90 |
815 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58280 |
1 |
|
|
T34 |
1187 |
|
T50 |
312 |
|
T90 |
739 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49658 |
1 |
|
|
T34 |
886 |
|
T50 |
1370 |
|
T90 |
1392 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1814 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1785 |
1 |
|
|
T34 |
50 |
|
T50 |
13 |
|
T90 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T34 |
46 |
|
T50 |
13 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T34 |
44 |
|
T50 |
12 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
17 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T34 |
41 |
|
T50 |
12 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T34 |
44 |
|
T50 |
10 |
|
T90 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T34 |
36 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T34 |
33 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T34 |
32 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
16 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T34 |
42 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
12 |
|
T50 |
1 |
|
T90 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T34 |
32 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60169 |
1 |
|
|
T34 |
1376 |
|
T50 |
304 |
|
T90 |
1279 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48705 |
1 |
|
|
T34 |
896 |
|
T50 |
314 |
|
T90 |
1343 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61002 |
1 |
|
|
T34 |
2222 |
|
T50 |
1263 |
|
T90 |
725 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47333 |
1 |
|
|
T34 |
802 |
|
T50 |
328 |
|
T90 |
581 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T34 |
45 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T34 |
41 |
|
T50 |
10 |
|
T90 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T34 |
43 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T34 |
42 |
|
T50 |
6 |
|
T90 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T34 |
42 |
|
T50 |
6 |
|
T90 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
17 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T34 |
41 |
|
T50 |
6 |
|
T90 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
17 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T34 |
41 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
17 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T34 |
40 |
|
T50 |
6 |
|
T90 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
17 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T34 |
39 |
|
T50 |
6 |
|
T90 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T34 |
37 |
|
T50 |
6 |
|
T90 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T34 |
32 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T34 |
35 |
|
T50 |
5 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T34 |
30 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T34 |
35 |
|
T50 |
5 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T34 |
29 |
|
T50 |
9 |
|
T90 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T34 |
34 |
|
T50 |
5 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T34 |
29 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T34 |
33 |
|
T50 |
5 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T34 |
29 |
|
T50 |
9 |
|
T90 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T34 |
33 |
|
T50 |
5 |
|
T90 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T34 |
28 |
|
T50 |
9 |
|
T90 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T34 |
32 |
|
T50 |
5 |
|
T90 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T34 |
28 |
|
T50 |
9 |
|
T90 |
17 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60089 |
1 |
|
|
T34 |
1513 |
|
T50 |
1432 |
|
T90 |
880 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46792 |
1 |
|
|
T34 |
824 |
|
T50 |
188 |
|
T90 |
784 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63104 |
1 |
|
|
T34 |
1164 |
|
T50 |
250 |
|
T90 |
1306 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45335 |
1 |
|
|
T34 |
1738 |
|
T50 |
266 |
|
T90 |
665 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T34 |
40 |
|
T50 |
13 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T34 |
43 |
|
T50 |
13 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T34 |
40 |
|
T50 |
12 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T34 |
43 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T34 |
41 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T34 |
40 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T34 |
36 |
|
T50 |
11 |
|
T90 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T34 |
33 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T34 |
31 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T34 |
31 |
|
T50 |
8 |
|
T90 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
31 |
|
T50 |
6 |
|
T90 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T34 |
30 |
|
T50 |
6 |
|
T90 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T34 |
33 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
28 |
|
T50 |
6 |
|
T90 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T34 |
32 |
|
T50 |
9 |
|
T90 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
22 |
|
T50 |
7 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T34 |
28 |
|
T50 |
6 |
|
T90 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T34 |
32 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63252 |
1 |
|
|
T34 |
1136 |
|
T50 |
418 |
|
T90 |
1910 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46961 |
1 |
|
|
T34 |
1904 |
|
T50 |
228 |
|
T90 |
491 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61241 |
1 |
|
|
T34 |
1389 |
|
T50 |
319 |
|
T90 |
1024 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44643 |
1 |
|
|
T34 |
877 |
|
T50 |
1198 |
|
T90 |
437 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
20 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
20 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
20 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
20 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T34 |
38 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T34 |
38 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T34 |
42 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T34 |
42 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T34 |
33 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T34 |
41 |
|
T50 |
8 |
|
T90 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T34 |
31 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T34 |
29 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T34 |
29 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T34 |
37 |
|
T50 |
7 |
|
T90 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T34 |
29 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T34 |
36 |
|
T50 |
7 |
|
T90 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T34 |
28 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T34 |
35 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
19 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T34 |
28 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T34 |
34 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56317 |
1 |
|
|
T34 |
1070 |
|
T50 |
1452 |
|
T90 |
771 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47205 |
1 |
|
|
T34 |
896 |
|
T50 |
227 |
|
T90 |
1597 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60541 |
1 |
|
|
T34 |
1286 |
|
T50 |
259 |
|
T90 |
842 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50198 |
1 |
|
|
T34 |
2040 |
|
T50 |
303 |
|
T90 |
533 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1781 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
22 |
|
T50 |
5 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T34 |
35 |
|
T50 |
8 |
|
T90 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T34 |
33 |
|
T50 |
7 |
|
T90 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T34 |
31 |
|
T50 |
7 |
|
T90 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T34 |
30 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T34 |
30 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T34 |
30 |
|
T50 |
7 |
|
T90 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T34 |
29 |
|
T50 |
7 |
|
T90 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T34 |
28 |
|
T50 |
7 |
|
T90 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T34 |
26 |
|
T50 |
7 |
|
T90 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T34 |
33 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T34 |
26 |
|
T50 |
7 |
|
T90 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
20 |
|
T50 |
4 |
|
T90 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T34 |
32 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58339 |
1 |
|
|
T34 |
1397 |
|
T50 |
548 |
|
T90 |
741 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54470 |
1 |
|
|
T34 |
1024 |
|
T50 |
1191 |
|
T90 |
782 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55676 |
1 |
|
|
T34 |
1328 |
|
T50 |
394 |
|
T90 |
807 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47507 |
1 |
|
|
T34 |
1546 |
|
T50 |
103 |
|
T90 |
1376 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
24 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
24 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
24 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
24 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T34 |
31 |
|
T50 |
6 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T34 |
35 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T34 |
31 |
|
T50 |
5 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T34 |
29 |
|
T50 |
5 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T34 |
27 |
|
T50 |
5 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T34 |
27 |
|
T50 |
5 |
|
T90 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T34 |
27 |
|
T50 |
5 |
|
T90 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T34 |
33 |
|
T50 |
7 |
|
T90 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T34 |
32 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T34 |
30 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
23 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T34 |
30 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
24 |
|
T50 |
6 |
|
T90 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
24 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61450 |
1 |
|
|
T34 |
1381 |
|
T50 |
290 |
|
T90 |
1414 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47465 |
1 |
|
|
T34 |
844 |
|
T50 |
1365 |
|
T90 |
572 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60522 |
1 |
|
|
T34 |
1975 |
|
T50 |
223 |
|
T90 |
925 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47395 |
1 |
|
|
T34 |
844 |
|
T50 |
277 |
|
T90 |
748 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T34 |
48 |
|
T50 |
15 |
|
T90 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T34 |
46 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T34 |
48 |
|
T50 |
15 |
|
T90 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T34 |
45 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T34 |
47 |
|
T50 |
15 |
|
T90 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T34 |
45 |
|
T50 |
14 |
|
T90 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T34 |
46 |
|
T50 |
15 |
|
T90 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T34 |
43 |
|
T50 |
14 |
|
T90 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T34 |
46 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T34 |
43 |
|
T50 |
14 |
|
T90 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
45 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T34 |
42 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
45 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T34 |
40 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T34 |
44 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T34 |
40 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T34 |
35 |
|
T50 |
14 |
|
T90 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T34 |
40 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T34 |
35 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T34 |
37 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T34 |
37 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T34 |
37 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T34 |
32 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T34 |
31 |
|
T50 |
9 |
|
T90 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
2 |
|
T90 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
24 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T34 |
31 |
|
T50 |
8 |
|
T90 |
25 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58179 |
1 |
|
|
T34 |
962 |
|
T50 |
1575 |
|
T90 |
756 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51505 |
1 |
|
|
T34 |
1289 |
|
T50 |
193 |
|
T90 |
1346 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59587 |
1 |
|
|
T34 |
1172 |
|
T50 |
294 |
|
T90 |
975 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46894 |
1 |
|
|
T34 |
1710 |
|
T50 |
158 |
|
T90 |
737 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T34 |
48 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T34 |
48 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T34 |
46 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T34 |
48 |
|
T50 |
9 |
|
T90 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T34 |
46 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T34 |
48 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T34 |
46 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T34 |
46 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T34 |
46 |
|
T50 |
9 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
46 |
|
T50 |
8 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T34 |
46 |
|
T50 |
8 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T34 |
46 |
|
T50 |
8 |
|
T90 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T34 |
43 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T34 |
43 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T34 |
36 |
|
T50 |
7 |
|
T90 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T34 |
36 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T34 |
35 |
|
T50 |
7 |
|
T90 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
17 |
|
T50 |
6 |
|
T90 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T34 |
32 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59794 |
1 |
|
|
T34 |
2048 |
|
T50 |
243 |
|
T90 |
583 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45284 |
1 |
|
|
T34 |
1077 |
|
T50 |
1082 |
|
T90 |
655 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58044 |
1 |
|
|
T34 |
1258 |
|
T50 |
383 |
|
T90 |
1685 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52569 |
1 |
|
|
T34 |
1019 |
|
T50 |
433 |
|
T90 |
800 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T34 |
40 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T34 |
42 |
|
T50 |
9 |
|
T90 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T34 |
40 |
|
T50 |
9 |
|
T90 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T34 |
38 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T34 |
32 |
|
T50 |
5 |
|
T90 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
32 |
|
T50 |
5 |
|
T90 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T34 |
31 |
|
T50 |
5 |
|
T90 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T34 |
30 |
|
T50 |
5 |
|
T90 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T34 |
30 |
|
T50 |
5 |
|
T90 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
17 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T34 |
27 |
|
T50 |
4 |
|
T90 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
24 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62631 |
1 |
|
|
T34 |
2091 |
|
T50 |
375 |
|
T90 |
925 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48945 |
1 |
|
|
T34 |
920 |
|
T50 |
224 |
|
T90 |
1284 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59659 |
1 |
|
|
T34 |
1040 |
|
T50 |
481 |
|
T90 |
1155 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46118 |
1 |
|
|
T34 |
1091 |
|
T50 |
1154 |
|
T90 |
562 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T34 |
47 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T34 |
46 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T34 |
45 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T34 |
43 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T34 |
42 |
|
T50 |
9 |
|
T90 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T34 |
41 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T34 |
41 |
|
T50 |
10 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T34 |
40 |
|
T50 |
9 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T34 |
36 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T34 |
40 |
|
T50 |
9 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T34 |
38 |
|
T50 |
9 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T34 |
38 |
|
T50 |
9 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T34 |
33 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T34 |
36 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T34 |
32 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T34 |
35 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62062 |
1 |
|
|
T34 |
1291 |
|
T50 |
296 |
|
T90 |
428 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51182 |
1 |
|
|
T34 |
2069 |
|
T50 |
1231 |
|
T90 |
1488 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58469 |
1 |
|
|
T34 |
781 |
|
T50 |
332 |
|
T90 |
795 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43213 |
1 |
|
|
T34 |
1132 |
|
T50 |
225 |
|
T90 |
937 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T34 |
50 |
|
T50 |
12 |
|
T90 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1773 |
1 |
|
|
T34 |
53 |
|
T50 |
11 |
|
T90 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T34 |
47 |
|
T50 |
12 |
|
T90 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T34 |
50 |
|
T50 |
11 |
|
T90 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T34 |
44 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T34 |
50 |
|
T50 |
11 |
|
T90 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T34 |
42 |
|
T50 |
11 |
|
T90 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T34 |
49 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T34 |
47 |
|
T50 |
11 |
|
T90 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T34 |
42 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T34 |
46 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T34 |
41 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T34 |
41 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T34 |
43 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T34 |
42 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T34 |
38 |
|
T50 |
9 |
|
T90 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T34 |
38 |
|
T50 |
8 |
|
T90 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
41 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T34 |
40 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T34 |
36 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
14 |
|
T50 |
8 |
|
T90 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T34 |
35 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
11 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61620 |
1 |
|
|
T34 |
1061 |
|
T50 |
1316 |
|
T90 |
947 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42178 |
1 |
|
|
T34 |
1105 |
|
T50 |
280 |
|
T90 |
1310 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65959 |
1 |
|
|
T34 |
1248 |
|
T50 |
232 |
|
T90 |
779 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47663 |
1 |
|
|
T34 |
1786 |
|
T50 |
290 |
|
T90 |
621 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T34 |
45 |
|
T50 |
15 |
|
T90 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T34 |
43 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T34 |
44 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T34 |
42 |
|
T50 |
13 |
|
T90 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T34 |
44 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T34 |
40 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T34 |
44 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T34 |
39 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T34 |
42 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T34 |
38 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T34 |
42 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T34 |
41 |
|
T50 |
12 |
|
T90 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T34 |
33 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T34 |
31 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
18 |
|
T50 |
5 |
|
T90 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T34 |
21 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59082 |
1 |
|
|
T34 |
2183 |
|
T50 |
229 |
|
T90 |
988 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46523 |
1 |
|
|
T34 |
1150 |
|
T50 |
167 |
|
T90 |
1326 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64619 |
1 |
|
|
T34 |
711 |
|
T50 |
382 |
|
T90 |
1064 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44690 |
1 |
|
|
T34 |
970 |
|
T50 |
1306 |
|
T90 |
504 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
16 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1773 |
1 |
|
|
T34 |
57 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T34 |
59 |
|
T50 |
16 |
|
T90 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
16 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T34 |
57 |
|
T50 |
14 |
|
T90 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T34 |
58 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
16 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T34 |
55 |
|
T50 |
14 |
|
T90 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T34 |
57 |
|
T50 |
15 |
|
T90 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
16 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T34 |
54 |
|
T50 |
14 |
|
T90 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T34 |
57 |
|
T50 |
15 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T34 |
54 |
|
T50 |
12 |
|
T90 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T34 |
54 |
|
T50 |
15 |
|
T90 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T34 |
53 |
|
T50 |
11 |
|
T90 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
50 |
|
T50 |
15 |
|
T90 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T34 |
53 |
|
T50 |
11 |
|
T90 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T34 |
46 |
|
T50 |
15 |
|
T90 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T34 |
53 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T34 |
44 |
|
T50 |
15 |
|
T90 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T34 |
53 |
|
T50 |
9 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T34 |
43 |
|
T50 |
15 |
|
T90 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T34 |
51 |
|
T50 |
7 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T34 |
42 |
|
T50 |
15 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T34 |
51 |
|
T50 |
7 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T34 |
41 |
|
T50 |
15 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T34 |
50 |
|
T50 |
7 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T34 |
41 |
|
T50 |
15 |
|
T90 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T34 |
50 |
|
T50 |
6 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T34 |
40 |
|
T50 |
15 |
|
T90 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T34 |
48 |
|
T50 |
6 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T34 |
38 |
|
T50 |
14 |
|
T90 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
15 |
|
T50 |
6 |
|
T90 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T34 |
45 |
|
T50 |
5 |
|
T90 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T34 |
38 |
|
T50 |
14 |
|
T90 |
12 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55674 |
1 |
|
|
T34 |
2142 |
|
T50 |
301 |
|
T90 |
932 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51741 |
1 |
|
|
T34 |
1137 |
|
T50 |
263 |
|
T90 |
1452 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59444 |
1 |
|
|
T34 |
1055 |
|
T50 |
475 |
|
T90 |
643 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48320 |
1 |
|
|
T34 |
965 |
|
T50 |
1174 |
|
T90 |
691 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T34 |
42 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T34 |
40 |
|
T50 |
6 |
|
T90 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T34 |
41 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T34 |
37 |
|
T50 |
7 |
|
T90 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T34 |
38 |
|
T50 |
6 |
|
T90 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T34 |
36 |
|
T50 |
7 |
|
T90 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T34 |
37 |
|
T50 |
6 |
|
T90 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T34 |
35 |
|
T50 |
6 |
|
T90 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T34 |
37 |
|
T50 |
6 |
|
T90 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T34 |
37 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T34 |
32 |
|
T50 |
6 |
|
T90 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T34 |
35 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T34 |
31 |
|
T50 |
6 |
|
T90 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T34 |
31 |
|
T50 |
6 |
|
T90 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
18 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
16 |
|
T50 |
7 |
|
T90 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T34 |
29 |
|
T50 |
6 |
|
T90 |
25 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62010 |
1 |
|
|
T34 |
932 |
|
T50 |
536 |
|
T90 |
889 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43240 |
1 |
|
|
T34 |
1068 |
|
T50 |
204 |
|
T90 |
426 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57154 |
1 |
|
|
T34 |
2324 |
|
T50 |
1230 |
|
T90 |
1279 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53401 |
1 |
|
|
T34 |
969 |
|
T50 |
225 |
|
T90 |
1253 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T34 |
14 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T34 |
47 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T34 |
14 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T34 |
47 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T34 |
14 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T34 |
45 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T34 |
14 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T34 |
45 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T34 |
41 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T34 |
41 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T34 |
42 |
|
T50 |
8 |
|
T90 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
39 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T34 |
37 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T34 |
40 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T34 |
36 |
|
T50 |
9 |
|
T90 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T34 |
39 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T34 |
39 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T34 |
35 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T34 |
38 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T34 |
37 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
16 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
19 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61748 |
1 |
|
|
T34 |
1229 |
|
T50 |
1256 |
|
T90 |
586 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51786 |
1 |
|
|
T34 |
1876 |
|
T50 |
297 |
|
T90 |
1401 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59891 |
1 |
|
|
T34 |
1674 |
|
T50 |
288 |
|
T90 |
871 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42058 |
1 |
|
|
T34 |
720 |
|
T50 |
246 |
|
T90 |
818 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T34 |
39 |
|
T50 |
15 |
|
T90 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T34 |
34 |
|
T50 |
16 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T34 |
40 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T34 |
31 |
|
T50 |
16 |
|
T90 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T34 |
30 |
|
T50 |
15 |
|
T90 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T34 |
36 |
|
T50 |
12 |
|
T90 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T34 |
30 |
|
T50 |
15 |
|
T90 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T34 |
28 |
|
T50 |
15 |
|
T90 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T34 |
27 |
|
T50 |
15 |
|
T90 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T34 |
27 |
|
T50 |
15 |
|
T90 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T34 |
27 |
|
T50 |
13 |
|
T90 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
12 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
17 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T34 |
26 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62655 |
1 |
|
|
T34 |
1619 |
|
T50 |
1375 |
|
T90 |
394 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53462 |
1 |
|
|
T34 |
863 |
|
T50 |
267 |
|
T90 |
1517 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56196 |
1 |
|
|
T34 |
1075 |
|
T50 |
410 |
|
T90 |
695 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43034 |
1 |
|
|
T34 |
1770 |
|
T50 |
138 |
|
T90 |
931 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T34 |
39 |
|
T50 |
12 |
|
T90 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T34 |
42 |
|
T50 |
10 |
|
T90 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T34 |
39 |
|
T50 |
12 |
|
T90 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T34 |
38 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T34 |
36 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T34 |
35 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T34 |
40 |
|
T50 |
7 |
|
T90 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T34 |
39 |
|
T50 |
7 |
|
T90 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T34 |
30 |
|
T50 |
12 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T34 |
36 |
|
T50 |
7 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T34 |
29 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T34 |
34 |
|
T50 |
7 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T34 |
29 |
|
T50 |
11 |
|
T90 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T34 |
28 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
33 |
|
T50 |
5 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T34 |
27 |
|
T50 |
10 |
|
T90 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T34 |
33 |
|
T50 |
5 |
|
T90 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T34 |
26 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T34 |
32 |
|
T50 |
5 |
|
T90 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T34 |
26 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T34 |
31 |
|
T50 |
5 |
|
T90 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T34 |
26 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
18 |
|
T50 |
6 |
|
T90 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T34 |
31 |
|
T50 |
5 |
|
T90 |
32 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58093 |
1 |
|
|
T34 |
1336 |
|
T50 |
361 |
|
T90 |
816 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46609 |
1 |
|
|
T34 |
1029 |
|
T50 |
351 |
|
T90 |
491 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59990 |
1 |
|
|
T34 |
1237 |
|
T50 |
118 |
|
T90 |
1286 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51754 |
1 |
|
|
T34 |
1662 |
|
T50 |
1268 |
|
T90 |
1288 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T34 |
40 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T34 |
38 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T34 |
39 |
|
T50 |
15 |
|
T90 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T34 |
36 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T34 |
39 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T34 |
36 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
21 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T34 |
39 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T34 |
32 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T34 |
39 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T34 |
32 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T34 |
38 |
|
T50 |
13 |
|
T90 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T34 |
31 |
|
T50 |
14 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T34 |
37 |
|
T50 |
12 |
|
T90 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T34 |
30 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T34 |
37 |
|
T50 |
12 |
|
T90 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T34 |
29 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T34 |
29 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
29 |
|
T50 |
12 |
|
T90 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T34 |
28 |
|
T50 |
11 |
|
T90 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T34 |
27 |
|
T50 |
11 |
|
T90 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T34 |
26 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T34 |
21 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
23 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T34 |
24 |
|
T50 |
11 |
|
T90 |
19 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57313 |
1 |
|
|
T34 |
883 |
|
T50 |
157 |
|
T90 |
770 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49357 |
1 |
|
|
T34 |
1646 |
|
T50 |
184 |
|
T90 |
681 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63605 |
1 |
|
|
T34 |
1848 |
|
T50 |
1375 |
|
T90 |
1764 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45225 |
1 |
|
|
T34 |
884 |
|
T50 |
407 |
|
T90 |
580 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T34 |
44 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T34 |
43 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T34 |
42 |
|
T50 |
13 |
|
T90 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T34 |
41 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T34 |
41 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
19 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T34 |
38 |
|
T50 |
11 |
|
T90 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T34 |
33 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T34 |
31 |
|
T50 |
8 |
|
T90 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T34 |
31 |
|
T50 |
7 |
|
T90 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T34 |
28 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T34 |
27 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T34 |
18 |
|
T50 |
4 |
|
T90 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T34 |
27 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
8 |
|
T90 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
18 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58216 |
1 |
|
|
T34 |
1077 |
|
T50 |
323 |
|
T90 |
827 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50278 |
1 |
|
|
T34 |
1120 |
|
T50 |
1193 |
|
T90 |
1504 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60536 |
1 |
|
|
T34 |
1122 |
|
T50 |
230 |
|
T90 |
898 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47302 |
1 |
|
|
T34 |
2020 |
|
T50 |
397 |
|
T90 |
471 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
15 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T34 |
44 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T34 |
45 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
15 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T34 |
44 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
15 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T34 |
43 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T34 |
44 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
15 |
|
T50 |
7 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T34 |
42 |
|
T50 |
11 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
44 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T34 |
43 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T34 |
42 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T34 |
40 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T34 |
40 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T34 |
39 |
|
T50 |
9 |
|
T90 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T34 |
39 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T34 |
38 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T34 |
37 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T34 |
36 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T34 |
34 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T34 |
33 |
|
T50 |
7 |
|
T90 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T34 |
33 |
|
T50 |
7 |
|
T90 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
18 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61056 |
1 |
|
|
T34 |
2158 |
|
T50 |
219 |
|
T90 |
1213 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46327 |
1 |
|
|
T34 |
1020 |
|
T50 |
422 |
|
T90 |
1254 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65154 |
1 |
|
|
T34 |
1154 |
|
T50 |
239 |
|
T90 |
834 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44576 |
1 |
|
|
T34 |
954 |
|
T50 |
1284 |
|
T90 |
472 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T34 |
37 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T34 |
39 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T34 |
39 |
|
T50 |
13 |
|
T90 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T34 |
38 |
|
T50 |
12 |
|
T90 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T34 |
38 |
|
T50 |
12 |
|
T90 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T34 |
37 |
|
T50 |
12 |
|
T90 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T34 |
36 |
|
T50 |
11 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T34 |
35 |
|
T50 |
14 |
|
T90 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T34 |
35 |
|
T50 |
11 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T34 |
35 |
|
T50 |
14 |
|
T90 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T34 |
34 |
|
T50 |
11 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T34 |
33 |
|
T50 |
14 |
|
T90 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T34 |
32 |
|
T50 |
11 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T34 |
32 |
|
T50 |
14 |
|
T90 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T34 |
31 |
|
T50 |
10 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T34 |
32 |
|
T50 |
14 |
|
T90 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T34 |
31 |
|
T50 |
10 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T34 |
32 |
|
T50 |
14 |
|
T90 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T34 |
31 |
|
T50 |
14 |
|
T90 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T34 |
30 |
|
T50 |
10 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T34 |
28 |
|
T50 |
13 |
|
T90 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T34 |
19 |
|
T50 |
3 |
|
T90 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T34 |
29 |
|
T50 |
9 |
|
T90 |
15 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60436 |
1 |
|
|
T34 |
2169 |
|
T50 |
170 |
|
T90 |
636 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51090 |
1 |
|
|
T34 |
948 |
|
T50 |
358 |
|
T90 |
738 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60057 |
1 |
|
|
T34 |
1410 |
|
T50 |
1195 |
|
T90 |
1579 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44521 |
1 |
|
|
T34 |
723 |
|
T50 |
355 |
|
T90 |
670 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T34 |
39 |
|
T50 |
20 |
|
T90 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T34 |
38 |
|
T50 |
18 |
|
T90 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T34 |
38 |
|
T50 |
20 |
|
T90 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T34 |
38 |
|
T50 |
18 |
|
T90 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T34 |
38 |
|
T50 |
19 |
|
T90 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T34 |
38 |
|
T50 |
18 |
|
T90 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
37 |
|
T50 |
18 |
|
T90 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
36 |
|
T50 |
16 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T34 |
38 |
|
T50 |
18 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T34 |
33 |
|
T50 |
16 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T34 |
38 |
|
T50 |
17 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T34 |
32 |
|
T50 |
16 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T34 |
38 |
|
T50 |
16 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T34 |
31 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T34 |
38 |
|
T50 |
14 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T34 |
31 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T34 |
36 |
|
T50 |
12 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T34 |
31 |
|
T50 |
15 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T34 |
36 |
|
T50 |
12 |
|
T90 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
29 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T34 |
26 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T34 |
25 |
|
T50 |
14 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T34 |
25 |
|
T50 |
14 |
|
T90 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T34 |
24 |
|
T50 |
14 |
|
T90 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
22 |
|
T50 |
2 |
|
T90 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T34 |
33 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T34 |
23 |
|
T50 |
14 |
|
T90 |
22 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56316 |
1 |
|
|
T34 |
1173 |
|
T50 |
293 |
|
T90 |
849 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51227 |
1 |
|
|
T34 |
1199 |
|
T50 |
1141 |
|
T90 |
755 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59927 |
1 |
|
|
T34 |
982 |
|
T50 |
232 |
|
T90 |
1016 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49368 |
1 |
|
|
T34 |
1979 |
|
T50 |
464 |
|
T90 |
1238 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T34 |
45 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T34 |
45 |
|
T50 |
15 |
|
T90 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T34 |
45 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T34 |
44 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T34 |
45 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T34 |
42 |
|
T50 |
15 |
|
T90 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T34 |
14 |
|
T50 |
6 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T34 |
45 |
|
T50 |
11 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T34 |
38 |
|
T50 |
15 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T34 |
46 |
|
T50 |
11 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T34 |
38 |
|
T50 |
15 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T34 |
45 |
|
T50 |
11 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T34 |
37 |
|
T50 |
15 |
|
T90 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T34 |
35 |
|
T50 |
15 |
|
T90 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T34 |
45 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
34 |
|
T50 |
15 |
|
T90 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T34 |
34 |
|
T50 |
15 |
|
T90 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T34 |
32 |
|
T50 |
15 |
|
T90 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T34 |
30 |
|
T50 |
15 |
|
T90 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T34 |
44 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T34 |
29 |
|
T50 |
15 |
|
T90 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T34 |
44 |
|
T50 |
7 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T34 |
28 |
|
T50 |
15 |
|
T90 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T34 |
44 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T34 |
28 |
|
T50 |
15 |
|
T90 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T34 |
13 |
|
T50 |
5 |
|
T90 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T34 |
43 |
|
T50 |
6 |
|
T90 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T34 |
14 |
|
T50 |
3 |
|
T90 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T34 |
26 |
|
T50 |
15 |
|
T90 |
16 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65253 |
1 |
|
|
T34 |
1048 |
|
T50 |
221 |
|
T90 |
1836 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41954 |
1 |
|
|
T34 |
1111 |
|
T50 |
205 |
|
T90 |
844 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63714 |
1 |
|
|
T34 |
955 |
|
T50 |
1390 |
|
T90 |
629 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45737 |
1 |
|
|
T34 |
2026 |
|
T50 |
320 |
|
T90 |
435 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T34 |
52 |
|
T50 |
16 |
|
T90 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T34 |
54 |
|
T50 |
11 |
|
T90 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T34 |
50 |
|
T50 |
16 |
|
T90 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T34 |
53 |
|
T50 |
11 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T34 |
50 |
|
T50 |
16 |
|
T90 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T34 |
52 |
|
T50 |
11 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T34 |
49 |
|
T50 |
15 |
|
T90 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T34 |
52 |
|
T50 |
10 |
|
T90 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T34 |
49 |
|
T50 |
15 |
|
T90 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T34 |
50 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T34 |
48 |
|
T50 |
15 |
|
T90 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T34 |
48 |
|
T50 |
10 |
|
T90 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T34 |
46 |
|
T50 |
15 |
|
T90 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T34 |
47 |
|
T50 |
10 |
|
T90 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T34 |
45 |
|
T50 |
14 |
|
T90 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T34 |
45 |
|
T50 |
10 |
|
T90 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T34 |
44 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T34 |
44 |
|
T50 |
10 |
|
T90 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T34 |
44 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T34 |
44 |
|
T50 |
10 |
|
T90 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T34 |
42 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T34 |
43 |
|
T50 |
10 |
|
T90 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T34 |
42 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T34 |
42 |
|
T50 |
9 |
|
T90 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T34 |
39 |
|
T50 |
11 |
|
T90 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T34 |
41 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T34 |
41 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T34 |
15 |
|
T50 |
2 |
|
T90 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T34 |
37 |
|
T50 |
11 |
|
T90 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T34 |
13 |
|
T50 |
7 |
|
T90 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T34 |
40 |
|
T50 |
8 |
|
T90 |
16 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57040 |
1 |
|
|
T34 |
2350 |
|
T50 |
446 |
|
T90 |
599 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53505 |
1 |
|
|
T34 |
952 |
|
T50 |
1102 |
|
T90 |
859 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60736 |
1 |
|
|
T34 |
1433 |
|
T50 |
583 |
|
T90 |
1222 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43973 |
1 |
|
|
T34 |
682 |
|
T50 |
104 |
|
T90 |
908 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
10 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T34 |
35 |
|
T50 |
4 |
|
T90 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T34 |
34 |
|
T50 |
6 |
|
T90 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
21 |
|
T50 |
10 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T34 |
34 |
|
T50 |
4 |
|
T90 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
21 |
|
T50 |
10 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T34 |
34 |
|
T50 |
4 |
|
T90 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T34 |
33 |
|
T50 |
6 |
|
T90 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T34 |
21 |
|
T50 |
10 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T34 |
33 |
|
T50 |
4 |
|
T90 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T34 |
32 |
|
T50 |
6 |
|
T90 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T34 |
33 |
|
T50 |
4 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
31 |
|
T50 |
6 |
|
T90 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T34 |
33 |
|
T50 |
4 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T34 |
30 |
|
T50 |
6 |
|
T90 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T34 |
33 |
|
T50 |
4 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T34 |
28 |
|
T50 |
6 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T34 |
32 |
|
T50 |
4 |
|
T90 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T34 |
28 |
|
T50 |
5 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T34 |
30 |
|
T50 |
4 |
|
T90 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T34 |
27 |
|
T50 |
5 |
|
T90 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T34 |
29 |
|
T50 |
4 |
|
T90 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T34 |
28 |
|
T50 |
4 |
|
T90 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T34 |
28 |
|
T50 |
4 |
|
T90 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T34 |
28 |
|
T50 |
4 |
|
T90 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T34 |
26 |
|
T50 |
5 |
|
T90 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T34 |
28 |
|
T50 |
4 |
|
T90 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T34 |
24 |
|
T50 |
5 |
|
T90 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
9 |
|
T90 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T34 |
28 |
|
T50 |
4 |
|
T90 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
21 |
|
T50 |
7 |
|
T90 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T34 |
24 |
|
T50 |
5 |
|
T90 |
33 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59460 |
1 |
|
|
T34 |
1032 |
|
T50 |
1364 |
|
T90 |
804 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46507 |
1 |
|
|
T34 |
872 |
|
T50 |
365 |
|
T90 |
823 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57312 |
1 |
|
|
T34 |
1649 |
|
T50 |
85 |
|
T90 |
1406 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51725 |
1 |
|
|
T34 |
1835 |
|
T50 |
306 |
|
T90 |
644 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T34 |
34 |
|
T50 |
15 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T34 |
37 |
|
T50 |
15 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T34 |
30 |
|
T50 |
14 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T34 |
36 |
|
T50 |
15 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T34 |
30 |
|
T50 |
14 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T34 |
29 |
|
T50 |
14 |
|
T90 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T34 |
28 |
|
T50 |
14 |
|
T90 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T34 |
36 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T34 |
25 |
|
T50 |
13 |
|
T90 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T34 |
25 |
|
T50 |
13 |
|
T90 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T34 |
23 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T34 |
25 |
|
T50 |
13 |
|
T90 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T34 |
25 |
|
T50 |
13 |
|
T90 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T34 |
24 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T34 |
24 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T34 |
24 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T34 |
32 |
|
T50 |
13 |
|
T90 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T34 |
24 |
|
T50 |
13 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T34 |
31 |
|
T50 |
12 |
|
T90 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T34 |
24 |
|
T50 |
12 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T34 |
30 |
|
T50 |
12 |
|
T90 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T34 |
24 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
20 |
|
T50 |
3 |
|
T90 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T34 |
29 |
|
T50 |
12 |
|
T90 |
25 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57542 |
1 |
|
|
T34 |
1281 |
|
T50 |
340 |
|
T90 |
732 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53657 |
1 |
|
|
T34 |
2011 |
|
T50 |
121 |
|
T90 |
1510 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53101 |
1 |
|
|
T34 |
932 |
|
T50 |
561 |
|
T90 |
947 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52032 |
1 |
|
|
T34 |
961 |
|
T50 |
1215 |
|
T90 |
543 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T34 |
45 |
|
T50 |
9 |
|
T90 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T34 |
43 |
|
T50 |
10 |
|
T90 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T34 |
44 |
|
T50 |
9 |
|
T90 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T34 |
40 |
|
T50 |
10 |
|
T90 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T34 |
40 |
|
T50 |
10 |
|
T90 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T34 |
19 |
|
T50 |
6 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T34 |
38 |
|
T50 |
10 |
|
T90 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T34 |
44 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T34 |
37 |
|
T50 |
10 |
|
T90 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T34 |
43 |
|
T50 |
8 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T34 |
43 |
|
T50 |
6 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T34 |
42 |
|
T50 |
4 |
|
T90 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T34 |
41 |
|
T50 |
4 |
|
T90 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T34 |
36 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T34 |
39 |
|
T50 |
3 |
|
T90 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T34 |
37 |
|
T50 |
3 |
|
T90 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
37 |
|
T50 |
3 |
|
T90 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T34 |
37 |
|
T50 |
3 |
|
T90 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T34 |
34 |
|
T50 |
10 |
|
T90 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T34 |
37 |
|
T50 |
3 |
|
T90 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
19 |
|
T50 |
5 |
|
T90 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T34 |
37 |
|
T50 |
3 |
|
T90 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T34 |
33 |
|
T50 |
9 |
|
T90 |
22 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64803 |
1 |
|
|
T34 |
1455 |
|
T50 |
128 |
|
T90 |
721 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51668 |
1 |
|
|
T34 |
1803 |
|
T50 |
291 |
|
T90 |
1170 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58048 |
1 |
|
|
T34 |
1026 |
|
T50 |
447 |
|
T90 |
1156 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41859 |
1 |
|
|
T34 |
976 |
|
T50 |
1280 |
|
T90 |
765 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T34 |
39 |
|
T50 |
14 |
|
T90 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T34 |
40 |
|
T50 |
13 |
|
T90 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T34 |
40 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T34 |
39 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T34 |
22 |
|
T50 |
4 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T34 |
39 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T34 |
36 |
|
T50 |
13 |
|
T90 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T34 |
38 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T34 |
37 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T34 |
34 |
|
T50 |
13 |
|
T90 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
36 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T34 |
22 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T34 |
34 |
|
T50 |
12 |
|
T90 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T34 |
35 |
|
T50 |
13 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T34 |
33 |
|
T50 |
12 |
|
T90 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T34 |
31 |
|
T50 |
12 |
|
T90 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T34 |
31 |
|
T50 |
12 |
|
T90 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T34 |
35 |
|
T50 |
10 |
|
T90 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T34 |
31 |
|
T50 |
11 |
|
T90 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T34 |
34 |
|
T50 |
9 |
|
T90 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T34 |
31 |
|
T50 |
11 |
|
T90 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T34 |
33 |
|
T50 |
8 |
|
T90 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T34 |
31 |
|
T50 |
11 |
|
T90 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T34 |
33 |
|
T50 |
8 |
|
T90 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T34 |
21 |
|
T50 |
3 |
|
T90 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T34 |
29 |
|
T50 |
11 |
|
T90 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T34 |
20 |
|
T50 |
5 |
|
T90 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T34 |
32 |
|
T50 |
8 |
|
T90 |
26 |