Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8915537 |
1 |
|
|
T25 |
1109 |
|
T26 |
49508 |
|
T1 |
34 |
| auto[1] |
6901415 |
1 |
|
|
T25 |
858 |
|
T1 |
20 |
|
T11 |
6351 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13060636 |
1 |
|
|
T25 |
1516 |
|
T26 |
49508 |
|
T1 |
54 |
| auto[1] |
2756316 |
1 |
|
|
T25 |
451 |
|
T11 |
3979 |
|
T2 |
121 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8937713 |
1 |
|
|
T25 |
995 |
|
T26 |
49508 |
|
T1 |
35 |
| auto[1] |
6879239 |
1 |
|
|
T25 |
972 |
|
T1 |
19 |
|
T11 |
6141 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2056368 |
1 |
|
|
T25 |
257 |
|
T1 |
6 |
|
T11 |
1162 |
| auto[1] |
auto[0] |
auto[1] |
1373430 |
1 |
|
|
T25 |
213 |
|
T11 |
2061 |
|
T2 |
55 |
| auto[1] |
auto[1] |
auto[0] |
2066555 |
1 |
|
|
T25 |
264 |
|
T1 |
13 |
|
T11 |
1000 |
| auto[1] |
auto[1] |
auto[1] |
1382886 |
1 |
|
|
T25 |
238 |
|
T11 |
1918 |
|
T2 |
66 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |