Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2986679 |
1 |
|
|
T25 |
335 |
|
T1 |
23 |
|
T11 |
3206 |
auto[1] |
auto[0] |
auto[1] |
433755 |
1 |
|
|
T25 |
77 |
|
T1 |
1 |
|
T11 |
443 |
auto[1] |
auto[1] |
auto[0] |
2999651 |
1 |
|
|
T25 |
550 |
|
T1 |
8 |
|
T11 |
2799 |
auto[1] |
auto[1] |
auto[1] |
437673 |
1 |
|
|
T25 |
103 |
|
T1 |
1 |
|
T11 |
366 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |