Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8921966 |
1 |
|
|
T25 |
954 |
|
T26 |
49508 |
|
T1 |
50 |
| auto[1] |
6894986 |
1 |
|
|
T25 |
1013 |
|
T1 |
4 |
|
T11 |
6531 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13044436 |
1 |
|
|
T25 |
1475 |
|
T26 |
49508 |
|
T1 |
54 |
| auto[1] |
2772516 |
1 |
|
|
T25 |
492 |
|
T11 |
4142 |
|
T2 |
65 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8921831 |
1 |
|
|
T25 |
969 |
|
T26 |
49508 |
|
T1 |
35 |
| auto[1] |
6895121 |
1 |
|
|
T25 |
998 |
|
T1 |
19 |
|
T11 |
6470 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2056321 |
1 |
|
|
T25 |
268 |
|
T1 |
19 |
|
T11 |
1311 |
| auto[1] |
auto[0] |
auto[1] |
1385173 |
1 |
|
|
T25 |
241 |
|
T11 |
2218 |
|
T2 |
56 |
| auto[1] |
auto[1] |
auto[0] |
2066284 |
1 |
|
|
T25 |
238 |
|
T11 |
1017 |
|
T2 |
118 |
| auto[1] |
auto[1] |
auto[1] |
1387343 |
1 |
|
|
T25 |
251 |
|
T11 |
1924 |
|
T2 |
9 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |