Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8937787 |
1 |
|
|
T25 |
943 |
|
T26 |
49508 |
|
T1 |
54 |
| auto[1] |
6879165 |
1 |
|
|
T25 |
1024 |
|
T11 |
6918 |
|
T2 |
381 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13061421 |
1 |
|
|
T25 |
1422 |
|
T26 |
49508 |
|
T1 |
49 |
| auto[1] |
2755531 |
1 |
|
|
T25 |
545 |
|
T1 |
5 |
|
T11 |
4187 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8955025 |
1 |
|
|
T25 |
888 |
|
T26 |
49508 |
|
T1 |
47 |
| auto[1] |
6861927 |
1 |
|
|
T25 |
1079 |
|
T1 |
7 |
|
T11 |
6856 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2037798 |
1 |
|
|
T25 |
234 |
|
T1 |
2 |
|
T11 |
1300 |
| auto[1] |
auto[0] |
auto[1] |
1375104 |
1 |
|
|
T25 |
214 |
|
T1 |
5 |
|
T11 |
2186 |
| auto[1] |
auto[1] |
auto[0] |
2068598 |
1 |
|
|
T25 |
300 |
|
T11 |
1369 |
|
T2 |
100 |
| auto[1] |
auto[1] |
auto[1] |
1380427 |
1 |
|
|
T25 |
331 |
|
T11 |
2001 |
|
T2 |
67 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |