Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8950130 |
1 |
|
|
T25 |
840 |
|
T26 |
49508 |
|
T1 |
37 |
| auto[1] |
6866822 |
1 |
|
|
T25 |
1127 |
|
T1 |
17 |
|
T11 |
6271 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14942943 |
1 |
|
|
T25 |
1741 |
|
T26 |
49508 |
|
T1 |
54 |
| auto[1] |
874009 |
1 |
|
|
T25 |
226 |
|
T11 |
900 |
|
T2 |
15 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8935939 |
1 |
|
|
T25 |
865 |
|
T26 |
49508 |
|
T1 |
49 |
| auto[1] |
6881013 |
1 |
|
|
T25 |
1102 |
|
T1 |
5 |
|
T11 |
7380 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3006487 |
1 |
|
|
T25 |
388 |
|
T1 |
5 |
|
T11 |
3602 |
| auto[1] |
auto[0] |
auto[1] |
437720 |
1 |
|
|
T25 |
100 |
|
T11 |
522 |
|
T2 |
9 |
| auto[1] |
auto[1] |
auto[0] |
3000517 |
1 |
|
|
T25 |
488 |
|
T11 |
2878 |
|
T2 |
201 |
| auto[1] |
auto[1] |
auto[1] |
436289 |
1 |
|
|
T25 |
126 |
|
T11 |
378 |
|
T2 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |