Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8974682 |
1 |
|
|
T25 |
1082 |
|
T26 |
49508 |
|
T1 |
45 |
| auto[1] |
6842270 |
1 |
|
|
T25 |
885 |
|
T1 |
9 |
|
T11 |
7151 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14947295 |
1 |
|
|
T25 |
1804 |
|
T26 |
49508 |
|
T1 |
53 |
| auto[1] |
869657 |
1 |
|
|
T25 |
163 |
|
T1 |
1 |
|
T11 |
707 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8949070 |
1 |
|
|
T25 |
1144 |
|
T26 |
49508 |
|
T1 |
33 |
| auto[1] |
6867882 |
1 |
|
|
T25 |
823 |
|
T1 |
21 |
|
T11 |
6337 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3033425 |
1 |
|
|
T25 |
428 |
|
T1 |
15 |
|
T11 |
2716 |
| auto[1] |
auto[0] |
auto[1] |
441876 |
1 |
|
|
T25 |
112 |
|
T1 |
1 |
|
T11 |
328 |
| auto[1] |
auto[1] |
auto[0] |
2964800 |
1 |
|
|
T25 |
232 |
|
T1 |
5 |
|
T11 |
2914 |
| auto[1] |
auto[1] |
auto[1] |
427781 |
1 |
|
|
T25 |
51 |
|
T11 |
379 |
|
T2 |
15 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |