Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8908834 |
1 |
|
|
T25 |
833 |
|
T26 |
49508 |
|
T1 |
34 |
| auto[1] |
6908118 |
1 |
|
|
T25 |
1134 |
|
T1 |
20 |
|
T11 |
6494 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14941682 |
1 |
|
|
T25 |
1764 |
|
T26 |
49508 |
|
T1 |
52 |
| auto[1] |
875270 |
1 |
|
|
T25 |
203 |
|
T1 |
2 |
|
T11 |
734 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8931110 |
1 |
|
|
T25 |
822 |
|
T26 |
49508 |
|
T1 |
20 |
| auto[1] |
6885842 |
1 |
|
|
T25 |
1145 |
|
T1 |
34 |
|
T11 |
6691 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2997255 |
1 |
|
|
T25 |
424 |
|
T1 |
22 |
|
T11 |
2816 |
| auto[1] |
auto[0] |
auto[1] |
435260 |
1 |
|
|
T25 |
84 |
|
T1 |
1 |
|
T11 |
326 |
| auto[1] |
auto[1] |
auto[0] |
3013317 |
1 |
|
|
T25 |
518 |
|
T1 |
10 |
|
T11 |
3141 |
| auto[1] |
auto[1] |
auto[1] |
440010 |
1 |
|
|
T25 |
119 |
|
T1 |
1 |
|
T11 |
408 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |