Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7055536 |
1 |
|
|
T25 |
342 |
|
T26 |
1119 |
|
T27 |
465 |
| auto[1] |
4898992 |
1 |
|
|
T30 |
484 |
|
T34 |
30 |
|
T1 |
57032 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9924575 |
1 |
|
|
T25 |
342 |
|
T26 |
1119 |
|
T27 |
465 |
| auto[1] |
2029953 |
1 |
|
|
T30 |
445 |
|
T34 |
25 |
|
T1 |
35202 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7070857 |
1 |
|
|
T25 |
342 |
|
T26 |
1119 |
|
T27 |
465 |
| auto[1] |
4883671 |
1 |
|
|
T30 |
599 |
|
T34 |
44 |
|
T1 |
58657 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1426338 |
1 |
|
|
T30 |
73 |
|
T34 |
18 |
|
T1 |
11304 |
| auto[1] |
auto[0] |
auto[1] |
1018382 |
1 |
|
|
T30 |
208 |
|
T34 |
18 |
|
T1 |
16979 |
| auto[1] |
auto[1] |
auto[0] |
1427380 |
1 |
|
|
T30 |
81 |
|
T34 |
1 |
|
T1 |
12151 |
| auto[1] |
auto[1] |
auto[1] |
1011571 |
1 |
|
|
T30 |
237 |
|
T34 |
7 |
|
T1 |
18223 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |