cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56442 |
1 |
|
|
T23 |
125 |
|
T30 |
1305 |
|
T102 |
459 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51186 |
1 |
|
|
T23 |
204 |
|
T30 |
831 |
|
T102 |
1334 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56487 |
1 |
|
|
T23 |
117 |
|
T30 |
1452 |
|
T102 |
185 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44932 |
1 |
|
|
T23 |
1460 |
|
T30 |
841 |
|
T102 |
444 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T23 |
13 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T23 |
12 |
|
T30 |
34 |
|
T102 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T23 |
12 |
|
T30 |
34 |
|
T102 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T23 |
12 |
|
T30 |
37 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T23 |
12 |
|
T30 |
34 |
|
T102 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T23 |
11 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T23 |
12 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T23 |
11 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T23 |
12 |
|
T30 |
32 |
|
T102 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T23 |
11 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T23 |
11 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T23 |
11 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T23 |
11 |
|
T30 |
33 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T23 |
10 |
|
T30 |
32 |
|
T102 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T23 |
9 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T23 |
9 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T23 |
11 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T23 |
9 |
|
T30 |
30 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T23 |
11 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T23 |
9 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
1 |
|
T30 |
21 |
|
T102 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T23 |
11 |
|
T30 |
27 |
|
T102 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57943 |
1 |
|
|
T23 |
102 |
|
T30 |
1224 |
|
T102 |
585 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45887 |
1 |
|
|
T23 |
144 |
|
T30 |
1504 |
|
T102 |
339 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57512 |
1 |
|
|
T23 |
1382 |
|
T30 |
679 |
|
T102 |
1158 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47578 |
1 |
|
|
T23 |
238 |
|
T30 |
888 |
|
T102 |
317 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T23 |
13 |
|
T30 |
42 |
|
T102 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T23 |
13 |
|
T30 |
47 |
|
T102 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T23 |
12 |
|
T30 |
41 |
|
T102 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
13 |
|
T30 |
46 |
|
T102 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
12 |
|
T30 |
39 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T23 |
13 |
|
T30 |
45 |
|
T102 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T23 |
13 |
|
T30 |
43 |
|
T102 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T23 |
13 |
|
T30 |
43 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T23 |
12 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T23 |
13 |
|
T30 |
43 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T23 |
13 |
|
T30 |
37 |
|
T102 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T23 |
13 |
|
T30 |
42 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T23 |
12 |
|
T30 |
37 |
|
T102 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T23 |
13 |
|
T30 |
42 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T23 |
12 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T23 |
13 |
|
T30 |
41 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T23 |
12 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T23 |
13 |
|
T30 |
41 |
|
T102 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T23 |
11 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T23 |
13 |
|
T30 |
40 |
|
T102 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T23 |
11 |
|
T30 |
33 |
|
T102 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T23 |
10 |
|
T30 |
31 |
|
T102 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T23 |
12 |
|
T30 |
38 |
|
T102 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T23 |
12 |
|
T30 |
37 |
|
T102 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
3 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T23 |
10 |
|
T30 |
37 |
|
T102 |
13 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59978 |
1 |
|
|
T23 |
1584 |
|
T30 |
1979 |
|
T102 |
451 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46847 |
1 |
|
|
T23 |
25 |
|
T30 |
687 |
|
T102 |
342 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56567 |
1 |
|
|
T23 |
273 |
|
T30 |
1056 |
|
T102 |
1263 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45815 |
1 |
|
|
T23 |
105 |
|
T30 |
791 |
|
T102 |
249 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T23 |
5 |
|
T30 |
30 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T23 |
4 |
|
T30 |
34 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T23 |
4 |
|
T30 |
34 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
7 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T23 |
4 |
|
T30 |
33 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T23 |
4 |
|
T30 |
26 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T23 |
4 |
|
T30 |
31 |
|
T102 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T23 |
4 |
|
T30 |
30 |
|
T102 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
3 |
|
T30 |
22 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T23 |
4 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
4 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
7 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T23 |
4 |
|
T30 |
28 |
|
T102 |
10 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54808 |
1 |
|
|
T23 |
113 |
|
T30 |
849 |
|
T102 |
489 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49192 |
1 |
|
|
T23 |
126 |
|
T30 |
764 |
|
T102 |
354 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56437 |
1 |
|
|
T23 |
378 |
|
T30 |
1675 |
|
T102 |
331 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48271 |
1 |
|
|
T23 |
1410 |
|
T30 |
1031 |
|
T102 |
1170 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T23 |
6 |
|
T30 |
41 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T23 |
6 |
|
T30 |
38 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T23 |
6 |
|
T30 |
36 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T23 |
5 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T23 |
5 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T23 |
5 |
|
T30 |
30 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T23 |
4 |
|
T30 |
26 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
11 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57053 |
1 |
|
|
T23 |
170 |
|
T30 |
1928 |
|
T102 |
223 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47457 |
1 |
|
|
T23 |
182 |
|
T30 |
598 |
|
T102 |
537 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52819 |
1 |
|
|
T23 |
281 |
|
T30 |
1089 |
|
T102 |
1132 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50434 |
1 |
|
|
T23 |
1388 |
|
T30 |
941 |
|
T102 |
414 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T23 |
7 |
|
T30 |
29 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T23 |
6 |
|
T30 |
27 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
3 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T23 |
6 |
|
T30 |
26 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T23 |
6 |
|
T30 |
26 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T23 |
6 |
|
T30 |
26 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T23 |
6 |
|
T30 |
29 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T23 |
6 |
|
T30 |
23 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T23 |
6 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53452 |
1 |
|
|
T23 |
213 |
|
T30 |
1163 |
|
T102 |
397 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47138 |
1 |
|
|
T23 |
131 |
|
T30 |
773 |
|
T102 |
318 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62245 |
1 |
|
|
T23 |
1456 |
|
T30 |
1308 |
|
T102 |
463 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46319 |
1 |
|
|
T23 |
173 |
|
T30 |
1177 |
|
T102 |
1188 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
4 |
|
T30 |
22 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
4 |
|
T30 |
22 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
4 |
|
T30 |
22 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
4 |
|
T30 |
22 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T23 |
9 |
|
T30 |
33 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T23 |
9 |
|
T30 |
32 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T23 |
6 |
|
T30 |
33 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T23 |
9 |
|
T30 |
30 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T23 |
7 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T23 |
4 |
|
T30 |
29 |
|
T102 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T23 |
7 |
|
T30 |
24 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T23 |
4 |
|
T30 |
28 |
|
T102 |
10 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59024 |
1 |
|
|
T23 |
54 |
|
T30 |
857 |
|
T102 |
1215 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45073 |
1 |
|
|
T23 |
351 |
|
T30 |
1326 |
|
T102 |
448 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57053 |
1 |
|
|
T23 |
72 |
|
T30 |
1373 |
|
T102 |
522 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47257 |
1 |
|
|
T23 |
1460 |
|
T30 |
789 |
|
T102 |
156 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T23 |
11 |
|
T30 |
40 |
|
T102 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T23 |
13 |
|
T30 |
41 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T23 |
10 |
|
T30 |
40 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T23 |
13 |
|
T30 |
41 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T23 |
13 |
|
T30 |
39 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T23 |
13 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T23 |
10 |
|
T30 |
37 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T23 |
13 |
|
T30 |
36 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T23 |
13 |
|
T30 |
36 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T23 |
13 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T23 |
13 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T23 |
13 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T23 |
13 |
|
T30 |
35 |
|
T102 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T23 |
13 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T23 |
13 |
|
T30 |
33 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T23 |
13 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T23 |
7 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T23 |
12 |
|
T30 |
32 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T23 |
7 |
|
T30 |
27 |
|
T102 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
19 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T23 |
11 |
|
T30 |
30 |
|
T102 |
8 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54321 |
1 |
|
|
T23 |
228 |
|
T30 |
1427 |
|
T102 |
1388 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47750 |
1 |
|
|
T23 |
179 |
|
T30 |
1079 |
|
T102 |
340 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62055 |
1 |
|
|
T23 |
1529 |
|
T30 |
1037 |
|
T102 |
353 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44165 |
1 |
|
|
T23 |
130 |
|
T30 |
809 |
|
T102 |
239 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T23 |
7 |
|
T30 |
47 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T23 |
6 |
|
T30 |
46 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T23 |
7 |
|
T30 |
46 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T23 |
6 |
|
T30 |
46 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T23 |
7 |
|
T30 |
46 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T23 |
5 |
|
T30 |
45 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T23 |
6 |
|
T30 |
44 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T23 |
6 |
|
T30 |
42 |
|
T102 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
6 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T23 |
5 |
|
T30 |
39 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T23 |
6 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T23 |
6 |
|
T30 |
40 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T23 |
6 |
|
T30 |
40 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T23 |
6 |
|
T30 |
40 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T23 |
5 |
|
T30 |
36 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T23 |
5 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56786 |
1 |
|
|
T23 |
300 |
|
T30 |
1409 |
|
T102 |
234 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44500 |
1 |
|
|
T23 |
73 |
|
T30 |
1025 |
|
T102 |
356 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57567 |
1 |
|
|
T23 |
304 |
|
T30 |
1140 |
|
T102 |
1148 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49760 |
1 |
|
|
T23 |
1341 |
|
T30 |
794 |
|
T102 |
573 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T23 |
5 |
|
T30 |
45 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T23 |
5 |
|
T30 |
40 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T23 |
5 |
|
T30 |
39 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T23 |
5 |
|
T30 |
40 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T23 |
3 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T23 |
4 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58167 |
1 |
|
|
T23 |
376 |
|
T30 |
1290 |
|
T102 |
568 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46088 |
1 |
|
|
T23 |
54 |
|
T30 |
736 |
|
T102 |
149 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53324 |
1 |
|
|
T23 |
296 |
|
T30 |
1363 |
|
T102 |
690 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51624 |
1 |
|
|
T23 |
1317 |
|
T30 |
1014 |
|
T102 |
1059 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T23 |
5 |
|
T30 |
40 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T23 |
3 |
|
T30 |
35 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T23 |
3 |
|
T30 |
40 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T23 |
3 |
|
T30 |
34 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T23 |
3 |
|
T30 |
39 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T23 |
3 |
|
T30 |
31 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T23 |
3 |
|
T30 |
39 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T23 |
3 |
|
T30 |
30 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T23 |
3 |
|
T30 |
38 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
3 |
|
T30 |
30 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T23 |
3 |
|
T30 |
37 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T23 |
3 |
|
T30 |
30 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T23 |
3 |
|
T30 |
28 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T23 |
2 |
|
T30 |
27 |
|
T102 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
19 |
|
T102 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T23 |
2 |
|
T30 |
27 |
|
T102 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
5 |
|
T30 |
16 |
|
T102 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
4 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57833 |
1 |
|
|
T23 |
290 |
|
T30 |
1932 |
|
T102 |
1146 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47403 |
1 |
|
|
T23 |
110 |
|
T30 |
742 |
|
T102 |
358 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59338 |
1 |
|
|
T23 |
173 |
|
T30 |
1116 |
|
T102 |
410 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43927 |
1 |
|
|
T23 |
1425 |
|
T30 |
779 |
|
T102 |
410 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T23 |
10 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T23 |
10 |
|
T30 |
31 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T23 |
10 |
|
T30 |
31 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T23 |
10 |
|
T30 |
29 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T23 |
8 |
|
T30 |
30 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
10 |
|
T30 |
28 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T23 |
10 |
|
T30 |
28 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T23 |
9 |
|
T30 |
27 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T23 |
9 |
|
T30 |
26 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T23 |
8 |
|
T30 |
25 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T23 |
8 |
|
T30 |
25 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T23 |
5 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T23 |
8 |
|
T30 |
25 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T23 |
7 |
|
T30 |
24 |
|
T102 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
15 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55966 |
1 |
|
|
T23 |
90 |
|
T30 |
1691 |
|
T102 |
1278 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47929 |
1 |
|
|
T23 |
1534 |
|
T30 |
949 |
|
T102 |
299 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57715 |
1 |
|
|
T23 |
147 |
|
T30 |
778 |
|
T102 |
525 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46015 |
1 |
|
|
T23 |
214 |
|
T30 |
794 |
|
T102 |
389 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1789 |
1 |
|
|
T23 |
9 |
|
T30 |
50 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T23 |
9 |
|
T30 |
52 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T23 |
8 |
|
T30 |
49 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T23 |
9 |
|
T30 |
51 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T23 |
8 |
|
T30 |
48 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T23 |
9 |
|
T30 |
49 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T23 |
8 |
|
T30 |
47 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T23 |
9 |
|
T30 |
47 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T23 |
8 |
|
T30 |
45 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T23 |
9 |
|
T30 |
45 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T23 |
8 |
|
T30 |
45 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T23 |
9 |
|
T30 |
44 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T23 |
9 |
|
T30 |
45 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T23 |
9 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T23 |
9 |
|
T30 |
44 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T23 |
9 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T23 |
9 |
|
T30 |
43 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T23 |
9 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T23 |
9 |
|
T30 |
42 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T23 |
9 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T23 |
9 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T23 |
7 |
|
T30 |
42 |
|
T102 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
7 |
|
T30 |
42 |
|
T102 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T23 |
7 |
|
T30 |
42 |
|
T102 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T23 |
7 |
|
T30 |
41 |
|
T102 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T23 |
8 |
|
T30 |
33 |
|
T102 |
11 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60683 |
1 |
|
|
T23 |
222 |
|
T30 |
1839 |
|
T102 |
1151 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51234 |
1 |
|
|
T23 |
109 |
|
T30 |
693 |
|
T102 |
475 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53262 |
1 |
|
|
T23 |
238 |
|
T30 |
1168 |
|
T102 |
275 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44212 |
1 |
|
|
T23 |
1443 |
|
T30 |
759 |
|
T102 |
397 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T23 |
6 |
|
T30 |
40 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T23 |
6 |
|
T30 |
39 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T23 |
6 |
|
T30 |
33 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T23 |
5 |
|
T30 |
36 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T23 |
6 |
|
T30 |
33 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T23 |
6 |
|
T30 |
32 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
5 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T23 |
6 |
|
T30 |
31 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T23 |
3 |
|
T30 |
34 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T23 |
6 |
|
T30 |
29 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
3 |
|
T30 |
32 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T23 |
6 |
|
T30 |
29 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T23 |
3 |
|
T30 |
32 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T23 |
6 |
|
T30 |
26 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
17 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T23 |
3 |
|
T30 |
31 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T23 |
6 |
|
T30 |
25 |
|
T102 |
16 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55235 |
1 |
|
|
T23 |
111 |
|
T30 |
1243 |
|
T102 |
270 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49967 |
1 |
|
|
T23 |
304 |
|
T30 |
1113 |
|
T102 |
408 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59960 |
1 |
|
|
T23 |
1418 |
|
T30 |
1298 |
|
T102 |
495 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44484 |
1 |
|
|
T23 |
208 |
|
T30 |
826 |
|
T102 |
1223 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T23 |
9 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T23 |
7 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T23 |
7 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T23 |
9 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T23 |
6 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T23 |
8 |
|
T30 |
33 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
6 |
|
T30 |
33 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T23 |
6 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T23 |
6 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T23 |
6 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63548 |
1 |
|
|
T23 |
723 |
|
T30 |
935 |
|
T102 |
565 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38932 |
1 |
|
|
T23 |
15 |
|
T30 |
678 |
|
T102 |
488 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58349 |
1 |
|
|
T23 |
1367 |
|
T30 |
1433 |
|
T102 |
1128 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49113 |
1 |
|
|
T23 |
35 |
|
T30 |
1372 |
|
T102 |
249 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T23 |
1 |
|
T30 |
38 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T23 |
2 |
|
T30 |
41 |
|
T102 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T30 |
36 |
|
T102 |
15 |
|
T11 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T23 |
2 |
|
T30 |
40 |
|
T102 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T30 |
36 |
|
T102 |
16 |
|
T11 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
2 |
|
T30 |
40 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T30 |
35 |
|
T102 |
16 |
|
T11 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
4 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T23 |
2 |
|
T30 |
40 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T30 |
35 |
|
T102 |
16 |
|
T11 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T23 |
2 |
|
T30 |
39 |
|
T102 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T30 |
34 |
|
T102 |
15 |
|
T11 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T23 |
2 |
|
T30 |
39 |
|
T102 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T30 |
34 |
|
T102 |
15 |
|
T11 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T23 |
2 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T30 |
29 |
|
T102 |
14 |
|
T11 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T23 |
2 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T30 |
28 |
|
T102 |
14 |
|
T11 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T23 |
2 |
|
T30 |
35 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T30 |
28 |
|
T102 |
14 |
|
T11 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T23 |
2 |
|
T30 |
35 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T30 |
26 |
|
T102 |
14 |
|
T11 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T23 |
2 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T30 |
24 |
|
T102 |
14 |
|
T11 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T23 |
2 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T30 |
23 |
|
T102 |
14 |
|
T11 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T23 |
2 |
|
T30 |
32 |
|
T102 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T30 |
22 |
|
T102 |
14 |
|
T11 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T23 |
2 |
|
T30 |
31 |
|
T102 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
5 |
|
T30 |
21 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T30 |
22 |
|
T102 |
14 |
|
T11 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T23 |
2 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61476 |
1 |
|
|
T23 |
470 |
|
T30 |
1274 |
|
T102 |
308 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40902 |
1 |
|
|
T23 |
46 |
|
T30 |
1124 |
|
T102 |
320 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61951 |
1 |
|
|
T23 |
173 |
|
T30 |
1233 |
|
T102 |
1492 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44572 |
1 |
|
|
T23 |
1334 |
|
T30 |
1005 |
|
T102 |
376 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T23 |
5 |
|
T30 |
30 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T23 |
4 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T23 |
4 |
|
T30 |
27 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T23 |
3 |
|
T30 |
25 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T23 |
3 |
|
T30 |
22 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T23 |
3 |
|
T30 |
22 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
8 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60077 |
1 |
|
|
T23 |
1490 |
|
T30 |
1003 |
|
T102 |
1329 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45184 |
1 |
|
|
T23 |
231 |
|
T30 |
1359 |
|
T102 |
405 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54907 |
1 |
|
|
T23 |
114 |
|
T30 |
1308 |
|
T102 |
254 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47609 |
1 |
|
|
T23 |
166 |
|
T30 |
687 |
|
T102 |
308 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T23 |
9 |
|
T30 |
45 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T23 |
10 |
|
T30 |
41 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T23 |
9 |
|
T30 |
44 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T23 |
10 |
|
T30 |
40 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T23 |
9 |
|
T30 |
44 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T23 |
10 |
|
T30 |
40 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T23 |
9 |
|
T30 |
43 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T23 |
10 |
|
T30 |
37 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T23 |
9 |
|
T30 |
42 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T23 |
10 |
|
T30 |
36 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T23 |
10 |
|
T30 |
36 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T23 |
9 |
|
T30 |
42 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T23 |
9 |
|
T30 |
34 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T23 |
9 |
|
T30 |
40 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T23 |
9 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T23 |
9 |
|
T30 |
39 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T23 |
9 |
|
T30 |
38 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
1 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
10 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55780 |
1 |
|
|
T23 |
270 |
|
T30 |
1623 |
|
T102 |
701 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46618 |
1 |
|
|
T23 |
1495 |
|
T30 |
858 |
|
T102 |
1150 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55870 |
1 |
|
|
T23 |
89 |
|
T30 |
935 |
|
T102 |
320 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49749 |
1 |
|
|
T23 |
141 |
|
T30 |
981 |
|
T102 |
252 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T23 |
10 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T23 |
9 |
|
T30 |
38 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T23 |
10 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T23 |
10 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T23 |
10 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T23 |
9 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T23 |
9 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T23 |
9 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T23 |
9 |
|
T30 |
31 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T23 |
9 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T23 |
8 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
9 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T23 |
6 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T23 |
9 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T23 |
8 |
|
T30 |
27 |
|
T102 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
20 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T23 |
7 |
|
T30 |
26 |
|
T102 |
9 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55643 |
1 |
|
|
T23 |
99 |
|
T30 |
1792 |
|
T102 |
516 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49295 |
1 |
|
|
T23 |
1475 |
|
T30 |
678 |
|
T102 |
1171 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58883 |
1 |
|
|
T23 |
138 |
|
T30 |
1521 |
|
T102 |
456 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44762 |
1 |
|
|
T23 |
205 |
|
T30 |
484 |
|
T102 |
286 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T23 |
12 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T23 |
12 |
|
T30 |
36 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T23 |
12 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
12 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T23 |
12 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T23 |
11 |
|
T30 |
35 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T23 |
11 |
|
T30 |
32 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T23 |
11 |
|
T30 |
32 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T23 |
11 |
|
T30 |
31 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T23 |
10 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T23 |
9 |
|
T30 |
30 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T23 |
12 |
|
T30 |
29 |
|
T102 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T23 |
9 |
|
T30 |
27 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T23 |
11 |
|
T30 |
29 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T23 |
9 |
|
T30 |
27 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T23 |
11 |
|
T30 |
29 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
8 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T23 |
11 |
|
T30 |
28 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T23 |
8 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T23 |
11 |
|
T30 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T23 |
8 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T23 |
11 |
|
T30 |
24 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
2 |
|
T30 |
19 |
|
T102 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T23 |
7 |
|
T30 |
24 |
|
T102 |
11 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53053 |
1 |
|
|
T23 |
22 |
|
T30 |
1059 |
|
T102 |
191 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46024 |
1 |
|
|
T23 |
118 |
|
T30 |
1041 |
|
T102 |
535 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59521 |
1 |
|
|
T23 |
1587 |
|
T30 |
1427 |
|
T102 |
1169 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49164 |
1 |
|
|
T23 |
309 |
|
T30 |
794 |
|
T102 |
344 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T23 |
8 |
|
T30 |
43 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T23 |
8 |
|
T30 |
46 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T23 |
8 |
|
T30 |
46 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T23 |
8 |
|
T30 |
44 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T23 |
8 |
|
T30 |
43 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
8 |
|
T30 |
43 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T23 |
7 |
|
T30 |
39 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T23 |
8 |
|
T30 |
40 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T23 |
6 |
|
T30 |
38 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
2 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T23 |
6 |
|
T30 |
38 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
1 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T23 |
5 |
|
T30 |
38 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
1 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
1 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
1 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
1 |
|
T30 |
18 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
2 |
|
T30 |
15 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
14 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60156 |
1 |
|
|
T23 |
343 |
|
T30 |
1333 |
|
T102 |
305 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51994 |
1 |
|
|
T23 |
1281 |
|
T30 |
959 |
|
T102 |
234 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53698 |
1 |
|
|
T23 |
283 |
|
T30 |
769 |
|
T102 |
1684 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43527 |
1 |
|
|
T23 |
94 |
|
T30 |
1400 |
|
T102 |
299 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T23 |
3 |
|
T30 |
41 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T23 |
4 |
|
T30 |
45 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T23 |
3 |
|
T30 |
38 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T23 |
4 |
|
T30 |
42 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
4 |
|
T30 |
41 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
3 |
|
T30 |
35 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T23 |
3 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T23 |
3 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
8 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T23 |
3 |
|
T30 |
30 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T23 |
4 |
|
T30 |
38 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
7 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T23 |
2 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
7 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T23 |
2 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
7 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T23 |
2 |
|
T30 |
26 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
7 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T23 |
2 |
|
T30 |
25 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
7 |
|
T30 |
17 |
|
T102 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T23 |
2 |
|
T30 |
25 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
6 |
|
T30 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
5 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57594 |
1 |
|
|
T23 |
374 |
|
T30 |
951 |
|
T102 |
1411 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44922 |
1 |
|
|
T23 |
146 |
|
T30 |
1156 |
|
T102 |
169 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63568 |
1 |
|
|
T23 |
191 |
|
T30 |
1009 |
|
T102 |
501 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42724 |
1 |
|
|
T23 |
1293 |
|
T30 |
1290 |
|
T102 |
332 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T23 |
5 |
|
T30 |
49 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T23 |
7 |
|
T30 |
46 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T23 |
5 |
|
T30 |
48 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T23 |
7 |
|
T30 |
44 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T23 |
5 |
|
T30 |
46 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T23 |
7 |
|
T30 |
43 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T23 |
5 |
|
T30 |
45 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T23 |
7 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T23 |
6 |
|
T30 |
42 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T23 |
6 |
|
T30 |
41 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T23 |
5 |
|
T30 |
44 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T23 |
6 |
|
T30 |
41 |
|
T102 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
6 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T23 |
5 |
|
T30 |
41 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T23 |
5 |
|
T30 |
35 |
|
T102 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T23 |
5 |
|
T30 |
39 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T23 |
5 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T23 |
4 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
11 |
|
T102 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T23 |
5 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T23 |
3 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60705 |
1 |
|
|
T23 |
1571 |
|
T30 |
870 |
|
T102 |
701 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46730 |
1 |
|
|
T23 |
103 |
|
T30 |
1056 |
|
T102 |
260 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56019 |
1 |
|
|
T23 |
317 |
|
T30 |
923 |
|
T102 |
1424 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44267 |
1 |
|
|
T23 |
80 |
|
T30 |
1437 |
|
T102 |
124 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T23 |
4 |
|
T30 |
49 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1786 |
1 |
|
|
T23 |
4 |
|
T30 |
49 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T23 |
4 |
|
T30 |
49 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T23 |
4 |
|
T30 |
48 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T23 |
4 |
|
T30 |
47 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T23 |
4 |
|
T30 |
46 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T23 |
4 |
|
T30 |
45 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T23 |
4 |
|
T30 |
45 |
|
T102 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T23 |
4 |
|
T30 |
44 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T23 |
4 |
|
T30 |
44 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T23 |
4 |
|
T30 |
44 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T23 |
4 |
|
T30 |
43 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T23 |
3 |
|
T30 |
40 |
|
T102 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T23 |
4 |
|
T30 |
42 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T23 |
2 |
|
T30 |
39 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T23 |
2 |
|
T30 |
39 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T23 |
2 |
|
T30 |
38 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T23 |
2 |
|
T30 |
36 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T23 |
2 |
|
T30 |
35 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T23 |
2 |
|
T30 |
35 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T23 |
2 |
|
T30 |
33 |
|
T102 |
6 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58300 |
1 |
|
|
T23 |
216 |
|
T30 |
1007 |
|
T102 |
496 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45477 |
1 |
|
|
T23 |
80 |
|
T30 |
1222 |
|
T102 |
150 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55893 |
1 |
|
|
T23 |
199 |
|
T30 |
1155 |
|
T102 |
706 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48826 |
1 |
|
|
T23 |
1440 |
|
T30 |
911 |
|
T102 |
1139 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T23 |
10 |
|
T30 |
42 |
|
T102 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T23 |
8 |
|
T30 |
40 |
|
T102 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T23 |
10 |
|
T30 |
42 |
|
T102 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T23 |
6 |
|
T30 |
39 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T23 |
6 |
|
T30 |
37 |
|
T102 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T23 |
10 |
|
T30 |
39 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T23 |
7 |
|
T30 |
36 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T23 |
7 |
|
T30 |
36 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T23 |
9 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T23 |
4 |
|
T30 |
33 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T23 |
9 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T23 |
4 |
|
T30 |
33 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T23 |
9 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T23 |
9 |
|
T30 |
30 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T23 |
9 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
5 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T23 |
3 |
|
T30 |
32 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T23 |
9 |
|
T30 |
26 |
|
T102 |
9 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56007 |
1 |
|
|
T23 |
182 |
|
T30 |
1466 |
|
T102 |
554 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47567 |
1 |
|
|
T23 |
183 |
|
T30 |
826 |
|
T102 |
343 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60095 |
1 |
|
|
T23 |
294 |
|
T30 |
1039 |
|
T102 |
1298 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45460 |
1 |
|
|
T23 |
1368 |
|
T30 |
1207 |
|
T102 |
173 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T23 |
7 |
|
T30 |
37 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T23 |
7 |
|
T30 |
37 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T23 |
7 |
|
T30 |
28 |
|
T102 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T23 |
7 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T23 |
7 |
|
T30 |
25 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T23 |
3 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T23 |
6 |
|
T30 |
30 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
2 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
2 |
|
T30 |
17 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T23 |
7 |
|
T30 |
22 |
|
T102 |
10 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55603 |
1 |
|
|
T23 |
1383 |
|
T30 |
1560 |
|
T102 |
433 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45555 |
1 |
|
|
T23 |
330 |
|
T30 |
905 |
|
T102 |
279 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60424 |
1 |
|
|
T23 |
150 |
|
T30 |
866 |
|
T102 |
413 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46871 |
1 |
|
|
T23 |
154 |
|
T30 |
1025 |
|
T102 |
1233 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T23 |
7 |
|
T30 |
41 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T23 |
1 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T23 |
9 |
|
T30 |
46 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T23 |
7 |
|
T30 |
41 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T23 |
1 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T23 |
9 |
|
T30 |
45 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
1 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T23 |
9 |
|
T30 |
44 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
1 |
|
T30 |
16 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T23 |
9 |
|
T30 |
43 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T23 |
7 |
|
T30 |
34 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T23 |
8 |
|
T30 |
42 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T23 |
8 |
|
T30 |
40 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T23 |
8 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T23 |
7 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T23 |
6 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
1 |
|
T30 |
15 |
|
T102 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55486 |
1 |
|
|
T23 |
379 |
|
T30 |
1521 |
|
T102 |
467 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48742 |
1 |
|
|
T23 |
88 |
|
T30 |
448 |
|
T102 |
1162 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58802 |
1 |
|
|
T23 |
224 |
|
T30 |
1686 |
|
T102 |
526 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45478 |
1 |
|
|
T23 |
1357 |
|
T30 |
838 |
|
T102 |
273 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T23 |
5 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T23 |
4 |
|
T30 |
32 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T23 |
5 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T23 |
4 |
|
T30 |
30 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T23 |
5 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
3 |
|
T30 |
28 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T23 |
5 |
|
T30 |
32 |
|
T102 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T23 |
3 |
|
T30 |
27 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T23 |
3 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T23 |
5 |
|
T30 |
30 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T23 |
3 |
|
T30 |
25 |
|
T102 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T23 |
3 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T23 |
3 |
|
T30 |
21 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T23 |
5 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T23 |
5 |
|
T30 |
23 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T23 |
3 |
|
T30 |
20 |
|
T102 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
4 |
|
T30 |
23 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T23 |
5 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57746 |
1 |
|
|
T23 |
115 |
|
T30 |
1697 |
|
T102 |
480 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45497 |
1 |
|
|
T23 |
1333 |
|
T30 |
519 |
|
T102 |
215 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60597 |
1 |
|
|
T23 |
228 |
|
T30 |
1922 |
|
T102 |
536 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45565 |
1 |
|
|
T23 |
231 |
|
T30 |
422 |
|
T102 |
1206 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T23 |
12 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T23 |
11 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T23 |
11 |
|
T30 |
25 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T23 |
11 |
|
T30 |
28 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T23 |
10 |
|
T30 |
24 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T23 |
11 |
|
T30 |
27 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T23 |
10 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T23 |
11 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T23 |
9 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T23 |
11 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T23 |
9 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T23 |
11 |
|
T30 |
26 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T23 |
7 |
|
T30 |
24 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T23 |
11 |
|
T30 |
25 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T23 |
7 |
|
T30 |
23 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T23 |
11 |
|
T30 |
25 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T23 |
7 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T23 |
11 |
|
T30 |
25 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T23 |
11 |
|
T30 |
24 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T23 |
11 |
|
T30 |
22 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T23 |
6 |
|
T30 |
22 |
|
T102 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T23 |
11 |
|
T30 |
21 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T23 |
11 |
|
T30 |
21 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T23 |
11 |
|
T30 |
20 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
4 |
|
T30 |
25 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
24 |
|
T102 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T23 |
11 |
|
T30 |
20 |
|
T102 |
11 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56573 |
1 |
|
|
T23 |
212 |
|
T30 |
1852 |
|
T102 |
583 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46278 |
1 |
|
|
T23 |
189 |
|
T30 |
969 |
|
T102 |
342 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57845 |
1 |
|
|
T23 |
267 |
|
T30 |
910 |
|
T102 |
1276 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48296 |
1 |
|
|
T23 |
1330 |
|
T30 |
756 |
|
T102 |
283 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T23 |
8 |
|
T30 |
41 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T23 |
7 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T23 |
7 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T23 |
7 |
|
T30 |
36 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T23 |
7 |
|
T30 |
39 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T23 |
7 |
|
T30 |
35 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
4 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T23 |
7 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T23 |
6 |
|
T30 |
34 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T23 |
5 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T23 |
5 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T23 |
5 |
|
T30 |
29 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T23 |
5 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T23 |
5 |
|
T30 |
27 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T23 |
7 |
|
T30 |
31 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T23 |
5 |
|
T30 |
26 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T23 |
5 |
|
T30 |
26 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
3 |
|
T30 |
16 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T23 |
7 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T23 |
5 |
|
T30 |
26 |
|
T102 |
8 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57881 |
1 |
|
|
T23 |
298 |
|
T30 |
1397 |
|
T102 |
1138 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49447 |
1 |
|
|
T23 |
56 |
|
T30 |
921 |
|
T102 |
231 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52499 |
1 |
|
|
T23 |
317 |
|
T30 |
796 |
|
T102 |
520 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47835 |
1 |
|
|
T23 |
1342 |
|
T30 |
1227 |
|
T102 |
482 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1775 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
6 |
|
T30 |
17 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1769 |
1 |
|
|
T23 |
5 |
|
T30 |
45 |
|
T102 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T23 |
4 |
|
T30 |
41 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
6 |
|
T30 |
17 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T23 |
5 |
|
T30 |
43 |
|
T102 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
6 |
|
T30 |
17 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T23 |
5 |
|
T30 |
42 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
6 |
|
T30 |
17 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T23 |
4 |
|
T30 |
42 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T23 |
3 |
|
T30 |
39 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T23 |
4 |
|
T30 |
42 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T23 |
3 |
|
T30 |
37 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T23 |
4 |
|
T30 |
40 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T23 |
4 |
|
T30 |
39 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T23 |
3 |
|
T30 |
36 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T23 |
4 |
|
T30 |
37 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T23 |
3 |
|
T30 |
34 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T23 |
4 |
|
T30 |
36 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T23 |
3 |
|
T30 |
34 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T23 |
4 |
|
T30 |
35 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T23 |
4 |
|
T30 |
33 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
19 |
|
T102 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T23 |
3 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
6 |
|
T30 |
16 |
|
T102 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T23 |
4 |
|
T30 |
31 |
|
T102 |
16 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59313 |
1 |
|
|
T23 |
1340 |
|
T30 |
1280 |
|
T102 |
665 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43982 |
1 |
|
|
T23 |
225 |
|
T30 |
712 |
|
T102 |
248 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60454 |
1 |
|
|
T23 |
191 |
|
T30 |
1569 |
|
T102 |
474 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43794 |
1 |
|
|
T23 |
142 |
|
T30 |
935 |
|
T102 |
988 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T23 |
12 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T23 |
11 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T23 |
12 |
|
T30 |
36 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T23 |
11 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T23 |
12 |
|
T30 |
35 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
11 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T23 |
12 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T23 |
10 |
|
T30 |
40 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T23 |
12 |
|
T30 |
34 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
4 |
|
T30 |
18 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
9 |
|
T30 |
37 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T23 |
12 |
|
T30 |
31 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T23 |
12 |
|
T30 |
30 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T23 |
11 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T23 |
8 |
|
T30 |
37 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T23 |
10 |
|
T30 |
29 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T23 |
9 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T23 |
8 |
|
T30 |
35 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
9 |
|
T30 |
26 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T23 |
9 |
|
T30 |
25 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
3 |
|
T30 |
18 |
|
T102 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T23 |
9 |
|
T30 |
24 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
4 |
|
T30 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T23 |
7 |
|
T30 |
32 |
|
T102 |
4 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62129 |
1 |
|
|
T23 |
355 |
|
T30 |
1380 |
|
T102 |
415 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41151 |
1 |
|
|
T23 |
1457 |
|
T30 |
743 |
|
T102 |
211 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54975 |
1 |
|
|
T23 |
53 |
|
T30 |
1024 |
|
T102 |
649 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50278 |
1 |
|
|
T23 |
101 |
|
T30 |
1238 |
|
T102 |
1214 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T23 |
8 |
|
T30 |
39 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T23 |
10 |
|
T30 |
38 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T23 |
10 |
|
T30 |
37 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
2 |
|
T30 |
22 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T23 |
8 |
|
T30 |
38 |
|
T102 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T23 |
9 |
|
T30 |
36 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T23 |
5 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T23 |
8 |
|
T30 |
36 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T23 |
8 |
|
T30 |
34 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T23 |
9 |
|
T30 |
35 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T23 |
8 |
|
T30 |
33 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T23 |
9 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
8 |
|
T30 |
32 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T23 |
9 |
|
T30 |
33 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T23 |
8 |
|
T30 |
31 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T23 |
8 |
|
T30 |
29 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T23 |
8 |
|
T30 |
30 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T23 |
7 |
|
T30 |
29 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T23 |
8 |
|
T30 |
28 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T23 |
7 |
|
T30 |
26 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T23 |
4 |
|
T30 |
20 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T23 |
7 |
|
T30 |
26 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
2 |
|
T30 |
21 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T23 |
6 |
|
T30 |
28 |
|
T102 |
5 |