Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8081929 |
1 |
|
|
T21 |
78 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5948302 |
1 |
|
|
T21 |
129 |
|
T29 |
586 |
|
T31 |
16055 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13267523 |
1 |
|
|
T21 |
201 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
762708 |
1 |
|
|
T21 |
6 |
|
T29 |
124 |
|
T31 |
2328 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8072134 |
1 |
|
|
T21 |
99 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5958097 |
1 |
|
|
T21 |
108 |
|
T29 |
609 |
|
T31 |
14967 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2591120 |
1 |
|
|
T21 |
33 |
|
T29 |
279 |
|
T31 |
5899 |
| auto[1] |
auto[0] |
auto[1] |
380121 |
1 |
|
|
T29 |
69 |
|
T31 |
1150 |
|
T54 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2604269 |
1 |
|
|
T21 |
69 |
|
T29 |
206 |
|
T31 |
6740 |
| auto[1] |
auto[1] |
auto[1] |
382587 |
1 |
|
|
T21 |
6 |
|
T29 |
55 |
|
T31 |
1178 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |