Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8078110 |
1 |
|
|
T21 |
126 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5952121 |
1 |
|
|
T21 |
81 |
|
T29 |
585 |
|
T31 |
14443 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13265644 |
1 |
|
|
T21 |
197 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
764587 |
1 |
|
|
T21 |
10 |
|
T29 |
165 |
|
T31 |
2535 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8072406 |
1 |
|
|
T21 |
93 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5957825 |
1 |
|
|
T21 |
114 |
|
T29 |
802 |
|
T31 |
16546 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2597873 |
1 |
|
|
T21 |
70 |
|
T29 |
387 |
|
T31 |
7920 |
| auto[1] |
auto[0] |
auto[1] |
382349 |
1 |
|
|
T21 |
8 |
|
T29 |
109 |
|
T31 |
1426 |
| auto[1] |
auto[1] |
auto[0] |
2595365 |
1 |
|
|
T21 |
34 |
|
T29 |
250 |
|
T31 |
6091 |
| auto[1] |
auto[1] |
auto[1] |
382238 |
1 |
|
|
T21 |
2 |
|
T29 |
56 |
|
T31 |
1109 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |