Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8040418 |
1 |
|
|
T21 |
95 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5989813 |
1 |
|
|
T21 |
112 |
|
T29 |
793 |
|
T31 |
15763 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13262105 |
1 |
|
|
T21 |
197 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
768126 |
1 |
|
|
T21 |
10 |
|
T29 |
145 |
|
T31 |
2498 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8050280 |
1 |
|
|
T21 |
76 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5979951 |
1 |
|
|
T21 |
131 |
|
T29 |
772 |
|
T31 |
15919 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2601426 |
1 |
|
|
T21 |
48 |
|
T29 |
279 |
|
T31 |
6665 |
| auto[1] |
auto[0] |
auto[1] |
382690 |
1 |
|
|
T21 |
4 |
|
T29 |
66 |
|
T31 |
1225 |
| auto[1] |
auto[1] |
auto[0] |
2610399 |
1 |
|
|
T21 |
73 |
|
T29 |
348 |
|
T31 |
6756 |
| auto[1] |
auto[1] |
auto[1] |
385436 |
1 |
|
|
T21 |
6 |
|
T29 |
79 |
|
T31 |
1273 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |