Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8080865 |
1 |
|
|
T21 |
117 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5949366 |
1 |
|
|
T21 |
90 |
|
T29 |
714 |
|
T31 |
16098 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11594541 |
1 |
|
|
T21 |
131 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2435690 |
1 |
|
|
T21 |
76 |
|
T29 |
357 |
|
T31 |
9541 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8083308 |
1 |
|
|
T21 |
96 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5946923 |
1 |
|
|
T21 |
111 |
|
T29 |
747 |
|
T31 |
16736 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1755623 |
1 |
|
|
T21 |
6 |
|
T29 |
189 |
|
T31 |
3547 |
| auto[1] |
auto[0] |
auto[1] |
1219078 |
1 |
|
|
T21 |
44 |
|
T29 |
138 |
|
T31 |
4652 |
| auto[1] |
auto[1] |
auto[0] |
1755610 |
1 |
|
|
T21 |
29 |
|
T29 |
201 |
|
T31 |
3648 |
| auto[1] |
auto[1] |
auto[1] |
1216612 |
1 |
|
|
T21 |
32 |
|
T29 |
219 |
|
T31 |
4889 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |