Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8076079 |
1 |
|
|
T21 |
121 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5954152 |
1 |
|
|
T21 |
86 |
|
T29 |
768 |
|
T31 |
14684 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11590796 |
1 |
|
|
T21 |
155 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2439435 |
1 |
|
|
T21 |
52 |
|
T29 |
352 |
|
T31 |
8643 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8055423 |
1 |
|
|
T21 |
130 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5974808 |
1 |
|
|
T21 |
77 |
|
T29 |
725 |
|
T31 |
15698 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1768296 |
1 |
|
|
T21 |
20 |
|
T29 |
201 |
|
T31 |
3657 |
| auto[1] |
auto[0] |
auto[1] |
1224430 |
1 |
|
|
T21 |
35 |
|
T29 |
161 |
|
T31 |
4534 |
| auto[1] |
auto[1] |
auto[0] |
1767077 |
1 |
|
|
T21 |
5 |
|
T29 |
172 |
|
T31 |
3398 |
| auto[1] |
auto[1] |
auto[1] |
1215005 |
1 |
|
|
T21 |
17 |
|
T29 |
191 |
|
T31 |
4109 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |