Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8096319 |
1 |
|
|
T21 |
85 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5933912 |
1 |
|
|
T21 |
122 |
|
T29 |
496 |
|
T31 |
17647 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11592713 |
1 |
|
|
T21 |
180 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2437518 |
1 |
|
|
T21 |
27 |
|
T29 |
223 |
|
T31 |
8440 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8083721 |
1 |
|
|
T21 |
152 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5946510 |
1 |
|
|
T21 |
55 |
|
T29 |
462 |
|
T31 |
15276 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1755604 |
1 |
|
|
T21 |
5 |
|
T29 |
126 |
|
T31 |
3021 |
| auto[1] |
auto[0] |
auto[1] |
1221917 |
1 |
|
|
T21 |
11 |
|
T29 |
106 |
|
T31 |
3596 |
| auto[1] |
auto[1] |
auto[0] |
1753388 |
1 |
|
|
T21 |
23 |
|
T29 |
113 |
|
T31 |
3815 |
| auto[1] |
auto[1] |
auto[1] |
1215601 |
1 |
|
|
T21 |
16 |
|
T29 |
117 |
|
T31 |
4844 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |