Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8064351 |
1 |
|
|
T21 |
114 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5965880 |
1 |
|
|
T21 |
93 |
|
T29 |
778 |
|
T31 |
16192 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11595901 |
1 |
|
|
T21 |
164 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2434330 |
1 |
|
|
T21 |
43 |
|
T29 |
440 |
|
T31 |
8236 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8085056 |
1 |
|
|
T21 |
132 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5945175 |
1 |
|
|
T21 |
75 |
|
T29 |
910 |
|
T31 |
15073 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1753865 |
1 |
|
|
T21 |
20 |
|
T29 |
208 |
|
T31 |
3385 |
| auto[1] |
auto[0] |
auto[1] |
1217710 |
1 |
|
|
T21 |
22 |
|
T29 |
179 |
|
T31 |
4265 |
| auto[1] |
auto[1] |
auto[0] |
1756980 |
1 |
|
|
T21 |
12 |
|
T29 |
262 |
|
T31 |
3452 |
| auto[1] |
auto[1] |
auto[1] |
1216620 |
1 |
|
|
T21 |
21 |
|
T29 |
261 |
|
T31 |
3971 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |