Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8109024 |
1 |
|
|
T21 |
104 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5921207 |
1 |
|
|
T21 |
103 |
|
T29 |
602 |
|
T31 |
15202 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11580891 |
1 |
|
|
T21 |
142 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2449340 |
1 |
|
|
T21 |
65 |
|
T29 |
431 |
|
T31 |
8928 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8047013 |
1 |
|
|
T21 |
79 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5983218 |
1 |
|
|
T21 |
128 |
|
T29 |
864 |
|
T31 |
16212 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1777704 |
1 |
|
|
T21 |
34 |
|
T29 |
224 |
|
T31 |
3674 |
| auto[1] |
auto[0] |
auto[1] |
1230445 |
1 |
|
|
T21 |
32 |
|
T29 |
229 |
|
T31 |
4729 |
| auto[1] |
auto[1] |
auto[0] |
1756174 |
1 |
|
|
T21 |
29 |
|
T29 |
209 |
|
T31 |
3610 |
| auto[1] |
auto[1] |
auto[1] |
1218895 |
1 |
|
|
T21 |
33 |
|
T29 |
202 |
|
T31 |
4199 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |