Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8106363 |
1 |
|
|
T21 |
55 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5923868 |
1 |
|
|
T21 |
152 |
|
T29 |
509 |
|
T31 |
14975 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11598444 |
1 |
|
|
T21 |
149 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2431787 |
1 |
|
|
T21 |
58 |
|
T29 |
348 |
|
T31 |
8589 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8074316 |
1 |
|
|
T21 |
86 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5955915 |
1 |
|
|
T21 |
121 |
|
T29 |
690 |
|
T31 |
15384 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1769477 |
1 |
|
|
T21 |
22 |
|
T29 |
200 |
|
T31 |
3533 |
| auto[1] |
auto[0] |
auto[1] |
1223193 |
1 |
|
|
T21 |
15 |
|
T29 |
217 |
|
T31 |
4558 |
| auto[1] |
auto[1] |
auto[0] |
1754651 |
1 |
|
|
T21 |
41 |
|
T29 |
142 |
|
T31 |
3262 |
| auto[1] |
auto[1] |
auto[1] |
1208594 |
1 |
|
|
T21 |
43 |
|
T29 |
131 |
|
T31 |
4031 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |