Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8107385 |
1 |
|
|
T21 |
99 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5922846 |
1 |
|
|
T21 |
108 |
|
T29 |
673 |
|
T31 |
15165 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11591297 |
1 |
|
|
T21 |
174 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2438934 |
1 |
|
|
T21 |
33 |
|
T29 |
357 |
|
T31 |
9041 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8053856 |
1 |
|
|
T21 |
137 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5976375 |
1 |
|
|
T21 |
70 |
|
T29 |
717 |
|
T31 |
16358 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1779595 |
1 |
|
|
T21 |
18 |
|
T29 |
195 |
|
T31 |
3914 |
| auto[1] |
auto[0] |
auto[1] |
1227325 |
1 |
|
|
T21 |
8 |
|
T29 |
178 |
|
T31 |
4731 |
| auto[1] |
auto[1] |
auto[0] |
1757846 |
1 |
|
|
T21 |
19 |
|
T29 |
165 |
|
T31 |
3403 |
| auto[1] |
auto[1] |
auto[1] |
1211609 |
1 |
|
|
T21 |
25 |
|
T29 |
179 |
|
T31 |
4310 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |