Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8054941 |
1 |
|
|
T21 |
78 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5975290 |
1 |
|
|
T21 |
129 |
|
T29 |
621 |
|
T31 |
15568 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11589807 |
1 |
|
|
T21 |
127 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2440424 |
1 |
|
|
T21 |
80 |
|
T29 |
235 |
|
T31 |
8340 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8052675 |
1 |
|
|
T21 |
62 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5977556 |
1 |
|
|
T21 |
145 |
|
T29 |
492 |
|
T31 |
15208 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1768513 |
1 |
|
|
T21 |
23 |
|
T29 |
137 |
|
T31 |
3306 |
| auto[1] |
auto[0] |
auto[1] |
1221207 |
1 |
|
|
T21 |
29 |
|
T29 |
130 |
|
T31 |
3949 |
| auto[1] |
auto[1] |
auto[0] |
1768619 |
1 |
|
|
T21 |
42 |
|
T29 |
120 |
|
T31 |
3562 |
| auto[1] |
auto[1] |
auto[1] |
1219217 |
1 |
|
|
T21 |
51 |
|
T29 |
105 |
|
T31 |
4391 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |