Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8070002 |
1 |
|
|
T21 |
85 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5960229 |
1 |
|
|
T21 |
122 |
|
T29 |
951 |
|
T31 |
15906 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13267609 |
1 |
|
|
T21 |
198 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
762622 |
1 |
|
|
T21 |
9 |
|
T29 |
150 |
|
T31 |
2568 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8082949 |
1 |
|
|
T21 |
82 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5947282 |
1 |
|
|
T21 |
125 |
|
T29 |
763 |
|
T31 |
16423 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2604268 |
1 |
|
|
T21 |
44 |
|
T29 |
214 |
|
T31 |
7034 |
| auto[1] |
auto[0] |
auto[1] |
383208 |
1 |
|
|
T21 |
3 |
|
T29 |
54 |
|
T31 |
1302 |
| auto[1] |
auto[1] |
auto[0] |
2580392 |
1 |
|
|
T21 |
72 |
|
T29 |
399 |
|
T31 |
6821 |
| auto[1] |
auto[1] |
auto[1] |
379414 |
1 |
|
|
T21 |
6 |
|
T29 |
96 |
|
T31 |
1266 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |