Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8058676 |
1 |
|
|
T21 |
94 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5971555 |
1 |
|
|
T21 |
113 |
|
T29 |
752 |
|
T31 |
15077 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11589694 |
1 |
|
|
T21 |
163 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
2440537 |
1 |
|
|
T21 |
44 |
|
T29 |
300 |
|
T31 |
8615 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8057283 |
1 |
|
|
T21 |
105 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5972948 |
1 |
|
|
T21 |
102 |
|
T29 |
552 |
|
T31 |
15264 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1768229 |
1 |
|
|
T21 |
40 |
|
T29 |
84 |
|
T31 |
3420 |
| auto[1] |
auto[0] |
auto[1] |
1221594 |
1 |
|
|
T21 |
12 |
|
T29 |
122 |
|
T31 |
4450 |
| auto[1] |
auto[1] |
auto[0] |
1764182 |
1 |
|
|
T21 |
18 |
|
T29 |
168 |
|
T31 |
3229 |
| auto[1] |
auto[1] |
auto[1] |
1218943 |
1 |
|
|
T21 |
32 |
|
T29 |
178 |
|
T31 |
4165 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |