Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8039201 |
1 |
|
|
T21 |
80 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5991030 |
1 |
|
|
T21 |
127 |
|
T29 |
1013 |
|
T31 |
16299 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13263779 |
1 |
|
|
T21 |
201 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
766452 |
1 |
|
|
T21 |
6 |
|
T29 |
174 |
|
T31 |
2301 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8058515 |
1 |
|
|
T21 |
125 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5971716 |
1 |
|
|
T21 |
82 |
|
T29 |
802 |
|
T31 |
14820 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2581640 |
1 |
|
|
T21 |
42 |
|
T29 |
148 |
|
T31 |
6307 |
| auto[1] |
auto[0] |
auto[1] |
379272 |
1 |
|
|
T21 |
3 |
|
T29 |
35 |
|
T31 |
1176 |
| auto[1] |
auto[1] |
auto[0] |
2623624 |
1 |
|
|
T21 |
34 |
|
T29 |
480 |
|
T31 |
6212 |
| auto[1] |
auto[1] |
auto[1] |
387180 |
1 |
|
|
T21 |
3 |
|
T29 |
139 |
|
T31 |
1125 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |