Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8068489 |
1 |
|
|
T21 |
109 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5961742 |
1 |
|
|
T21 |
98 |
|
T29 |
559 |
|
T31 |
16459 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13267779 |
1 |
|
|
T21 |
199 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
762452 |
1 |
|
|
T21 |
8 |
|
T29 |
109 |
|
T31 |
2529 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8079318 |
1 |
|
|
T21 |
101 |
|
T22 |
204 |
|
T23 |
128 |
| auto[1] |
5950913 |
1 |
|
|
T21 |
106 |
|
T29 |
539 |
|
T31 |
16213 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2592120 |
1 |
|
|
T21 |
52 |
|
T29 |
211 |
|
T31 |
6434 |
| auto[1] |
auto[0] |
auto[1] |
380883 |
1 |
|
|
T21 |
5 |
|
T29 |
50 |
|
T31 |
1184 |
| auto[1] |
auto[1] |
auto[0] |
2596341 |
1 |
|
|
T21 |
46 |
|
T29 |
219 |
|
T31 |
7250 |
| auto[1] |
auto[1] |
auto[1] |
381569 |
1 |
|
|
T21 |
3 |
|
T29 |
59 |
|
T31 |
1345 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |