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Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1971678 1 T41 21 T42 176 T43 172
auto[1] 1721794 1 T41 91 T42 150 T43 110


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2319333 1 T41 55 T42 154 T43 135
auto[1] 1374139 1 T41 57 T42 172 T43 147


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1279312 1 T41 16 T42 93 T43 84
auto[0] auto[1] 692366 1 T41 5 T42 83 T43 88
auto[1] auto[0] 1040021 1 T41 39 T42 61 T43 51
auto[1] auto[1] 681773 1 T41 52 T42 89 T43 59


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969899 1 T41 53 T42 160 T43 120
auto[1] 1723573 1 T41 59 T42 166 T43 162


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2320199 1 T41 68 T42 163 T43 120
auto[1] 1373273 1 T41 44 T42 163 T43 162


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1277674 1 T41 47 T42 75 T43 56
auto[0] auto[1] 692225 1 T41 6 T42 85 T43 64
auto[1] auto[0] 1042525 1 T41 21 T42 88 T43 64
auto[1] auto[1] 681048 1 T41 38 T42 78 T43 98


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1966464 1 T41 35 T42 164 T43 152
auto[1] 1727008 1 T41 77 T42 162 T43 130


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2320257 1 T41 78 T42 168 T43 165
auto[1] 1373215 1 T41 34 T42 158 T43 117


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1276937 1 T41 32 T42 85 T43 89
auto[0] auto[1] 689527 1 T41 3 T42 79 T43 63
auto[1] auto[0] 1043320 1 T41 46 T42 83 T43 76
auto[1] auto[1] 683688 1 T41 31 T42 79 T43 54


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1973833 1 T41 59 T42 164 T43 128
auto[1] 1719639 1 T41 53 T42 162 T43 154


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2319442 1 T41 88 T42 161 T43 140
auto[1] 1374030 1 T41 24 T42 165 T43 142


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1280275 1 T41 47 T42 77 T43 57
auto[0] auto[1] 693558 1 T41 12 T42 87 T43 71
auto[1] auto[0] 1039167 1 T41 41 T42 84 T43 83
auto[1] auto[1] 680472 1 T41 12 T42 78 T43 71


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1970352 1 T41 45 T42 164 T43 128
auto[1] 1723120 1 T41 67 T42 162 T43 154


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2321382 1 T41 81 T42 150 T43 142
auto[1] 1372090 1 T41 31 T42 176 T43 140


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1279651 1 T41 45 T42 79 T43 66
auto[0] auto[1] 690701 1 T42 85 T43 62 T44 6544
auto[1] auto[0] 1041731 1 T41 36 T42 71 T43 76
auto[1] auto[1] 681389 1 T41 31 T42 91 T43 78


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1968810 1 T41 37 T42 162 T43 142
auto[1] 1724662 1 T41 75 T42 164 T43 140


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2321480 1 T41 64 T42 178 T43 138
auto[1] 1371992 1 T41 48 T42 148 T43 144


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1278287 1 T41 25 T42 88 T43 73
auto[0] auto[1] 690523 1 T41 12 T42 74 T43 69
auto[1] auto[0] 1043193 1 T41 39 T42 90 T43 65
auto[1] auto[1] 681469 1 T41 36 T42 74 T43 75


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1968353 1 T41 68 T42 178 T43 138
auto[1] 1725119 1 T41 44 T42 148 T43 144


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2318248 1 T41 82 T42 173 T43 129
auto[1] 1375224 1 T41 30 T42 153 T43 153


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1277560 1 T41 62 T42 98 T43 60
auto[0] auto[1] 690793 1 T41 6 T42 80 T43 78
auto[1] auto[0] 1040688 1 T41 20 T42 75 T43 69
auto[1] auto[1] 684431 1 T41 24 T42 73 T43 75


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969124 1 T41 47 T42 154 T43 134
auto[1] 1724348 1 T41 65 T42 172 T43 148


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2321231 1 T41 74 T42 159 T43 155
auto[1] 1372241 1 T41 38 T42 167 T43 127


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1279560 1 T41 44 T42 72 T43 74
auto[0] auto[1] 689564 1 T41 3 T42 82 T43 60
auto[1] auto[0] 1041671 1 T41 30 T42 87 T43 81
auto[1] auto[1] 682677 1 T41 35 T42 85 T43 67


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969308 1 T41 56 T42 156 T43 132
auto[1] 1724164 1 T41 56 T42 170 T43 150


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2326636 1 T41 77 T42 156 T43 123
auto[1] 1366836 1 T41 35 T42 170 T43 159


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1281719 1 T41 46 T42 78 T43 56
auto[0] auto[1] 687589 1 T41 10 T42 78 T43 76
auto[1] auto[0] 1044917 1 T41 31 T42 78 T43 67
auto[1] auto[1] 679247 1 T41 25 T42 92 T43 83


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1974243 1 T41 74 T42 144 T43 142
auto[1] 1719229 1 T41 38 T42 182 T43 140


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2331429 1 T41 106 T42 174 T43 158
auto[1] 1362043 1 T41 6 T42 152 T43 124


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1287397 1 T41 72 T42 83 T43 85
auto[0] auto[1] 686846 1 T41 2 T42 61 T43 57
auto[1] auto[0] 1044032 1 T41 34 T42 91 T43 73
auto[1] auto[1] 675197 1 T41 4 T42 91 T43 67


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969889 1 T41 63 T42 170 T43 132
auto[1] 1723583 1 T41 49 T42 156 T43 150


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2331673 1 T41 84 T42 168 T43 112
auto[1] 1361799 1 T41 28 T42 158 T43 170


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1284580 1 T41 52 T42 89 T43 54
auto[0] auto[1] 685309 1 T41 11 T42 81 T43 78
auto[1] auto[0] 1047093 1 T41 32 T42 79 T43 58
auto[1] auto[1] 676490 1 T41 17 T42 77 T43 92


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1968974 1 T41 73 T42 156 T43 148
auto[1] 1724498 1 T41 39 T42 170 T43 134


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2326332 1 T41 106 T42 157 T43 146
auto[1] 1367140 1 T41 6 T42 169 T43 136


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1279677 1 T41 69 T42 74 T43 79
auto[0] auto[1] 689297 1 T41 4 T42 82 T43 69
auto[1] auto[0] 1046655 1 T41 37 T42 83 T43 67
auto[1] auto[1] 677843 1 T41 2 T42 87 T43 67


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1971482 1 T41 50 T42 158 T43 138
auto[1] 1721990 1 T41 62 T42 168 T43 144


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2321697 1 T41 74 T42 168 T43 166
auto[1] 1371775 1 T41 38 T42 158 T43 116


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1279847 1 T41 50 T42 83 T43 80
auto[0] auto[1] 691635 1 T42 75 T43 58 T44 6705
auto[1] auto[0] 1041850 1 T41 24 T42 85 T43 86
auto[1] auto[1] 680140 1 T41 38 T42 83 T43 58


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969124 1 T41 91 T42 170 T43 156
auto[1] 1724348 1 T41 21 T42 156 T43 126


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2328787 1 T41 99 T42 157 T43 156
auto[1] 1364685 1 T41 13 T42 169 T43 126


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1281736 1 T41 79 T42 87 T43 90
auto[0] auto[1] 687388 1 T41 12 T42 83 T43 66
auto[1] auto[0] 1047051 1 T41 20 T42 70 T43 66
auto[1] auto[1] 677297 1 T41 1 T42 86 T43 60


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1972169 1 T41 72 T42 146 T43 140
auto[1] 1721303 1 T41 40 T42 180 T43 142


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2328998 1 T41 92 T42 158 T43 132
auto[1] 1364474 1 T41 20 T42 168 T43 150


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1283556 1 T41 64 T42 67 T43 68
auto[0] auto[1] 688613 1 T41 8 T42 79 T43 72
auto[1] auto[0] 1045442 1 T41 28 T42 91 T43 64
auto[1] auto[1] 675861 1 T41 12 T42 89 T43 78


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1972350 1 T41 60 T42 168 T43 122
auto[1] 1721122 1 T41 52 T42 158 T43 160


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2329236 1 T41 66 T42 159 T43 139
auto[1] 1364236 1 T41 46 T42 167 T43 143


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1283023 1 T41 48 T42 78 T43 61
auto[0] auto[1] 689327 1 T41 12 T42 90 T43 61
auto[1] auto[0] 1046213 1 T41 18 T42 81 T43 78
auto[1] auto[1] 674909 1 T41 34 T42 77 T43 82


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1972224 1 T41 68 T42 164 T43 128
auto[1] 1721248 1 T41 44 T42 162 T43 154


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2326837 1 T41 94 T42 163 T43 138
auto[1] 1366635 1 T41 18 T42 163 T43 144


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1283488 1 T41 58 T42 74 T43 67
auto[0] auto[1] 688736 1 T41 10 T42 90 T43 61
auto[1] auto[0] 1043349 1 T41 36 T42 89 T43 71
auto[1] auto[1] 677899 1 T41 8 T42 73 T43 83


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969278 1 T41 58 T42 170 T43 132
auto[1] 1724194 1 T41 54 T42 156 T43 150


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2330773 1 T41 71 T42 181 T43 147
auto[1] 1362699 1 T41 41 T42 145 T43 135


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1284353 1 T41 51 T42 95 T43 70
auto[0] auto[1] 684925 1 T41 7 T42 75 T43 62
auto[1] auto[0] 1046420 1 T41 20 T42 86 T43 77
auto[1] auto[1] 677774 1 T41 34 T42 70 T43 73


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1974731 1 T41 69 T42 160 T43 144
auto[1] 1718741 1 T41 43 T42 166 T43 138


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2326839 1 T41 93 T42 162 T43 115
auto[1] 1366633 1 T41 19 T42 164 T43 167


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1285020 1 T41 64 T42 82 T43 57
auto[0] auto[1] 689711 1 T41 5 T42 78 T43 87
auto[1] auto[0] 1041819 1 T41 29 T42 80 T43 58
auto[1] auto[1] 676922 1 T41 14 T42 86 T43 80


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1969262 1 T41 57 T42 150 T43 150
auto[1] 1724210 1 T41 55 T42 176 T43 132


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2325537 1 T41 103 T42 191 T43 138
auto[1] 1367935 1 T41 9 T42 135 T43 144


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1280087 1 T41 54 T42 88 T43 72
auto[0] auto[1] 689175 1 T41 3 T42 62 T43 78
auto[1] auto[0] 1045450 1 T41 49 T42 103 T43 66
auto[1] auto[1] 678760 1 T41 6 T42 73 T43 66


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1971401 1 T41 76 T42 150 T43 158
auto[1] 1722071 1 T41 36 T42 176 T43 124


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2329491 1 T41 100 T42 162 T43 143
auto[1] 1363981 1 T41 12 T42 164 T43 139


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1284112 1 T41 66 T42 77 T43 83
auto[0] auto[1] 687289 1 T41 10 T42 73 T43 75
auto[1] auto[0] 1045379 1 T41 34 T42 85 T43 60
auto[1] auto[1] 676692 1 T41 2 T42 91 T43 64


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1968142 1 T41 82 T42 174 T43 136
auto[1] 1725330 1 T41 30 T42 152 T43 146


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2330101 1 T41 103 T42 158 T43 147
auto[1] 1363371 1 T41 9 T42 168 T43 135


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1282674 1 T41 76 T42 88 T43 74
auto[0] auto[1] 685468 1 T41 6 T42 86 T43 62
auto[1] auto[0] 1047427 1 T41 27 T42 70 T43 73
auto[1] auto[1] 677903 1 T41 3 T42 82 T43 73


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1971137 1 T41 41 T42 156 T43 160
auto[1] 1722335 1 T41 71 T42 170 T43 122


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2324452 1 T41 60 T42 159 T43 141
auto[1] 1369020 1 T41 52 T42 167 T43 141


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1280019 1 T41 30 T42 77 T43 76
auto[0] auto[1] 691118 1 T41 11 T42 79 T43 84
auto[1] auto[0] 1044433 1 T41 30 T42 82 T43 65
auto[1] auto[1] 677902 1 T41 41 T42 88 T43 57


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1967202 1 T41 42 T42 148 T43 126
auto[1] 1726270 1 T41 70 T42 178 T43 156


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2322457 1 T41 67 T42 160 T43 124
auto[1] 1371015 1 T41 45 T42 166 T43 158


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1277881 1 T41 36 T42 66 T43 57
auto[0] auto[1] 689321 1 T41 6 T42 82 T43 69
auto[1] auto[0] 1044576 1 T41 31 T42 94 T43 67
auto[1] auto[1] 681694 1 T41 39 T42 84 T43 89


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1972621 1 T41 73 T42 168 T43 136
auto[1] 1720851 1 T41 39 T42 158 T43 146


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2326793 1 T41 97 T42 154 T43 136
auto[1] 1366679 1 T41 15 T42 172 T43 146


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1283383 1 T41 66 T42 77 T43 62
auto[0] auto[1] 689238 1 T41 7 T42 91 T43 74
auto[1] auto[0] 1043410 1 T41 31 T42 77 T43 74
auto[1] auto[1] 677441 1 T41 8 T42 81 T43 72


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1967697 1 T41 54 T42 162 T43 148
auto[1] 1725775 1 T41 58 T42 164 T43 134


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2328023 1 T41 94 T42 165 T43 131
auto[1] 1365449 1 T41 18 T42 161 T43 151


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1280268 1 T41 52 T42 81 T43 75
auto[0] auto[1] 687429 1 T41 2 T42 81 T43 73
auto[1] auto[0] 1047755 1 T41 42 T42 84 T43 56
auto[1] auto[1] 678020 1 T41 16 T42 80 T43 78


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1970151 1 T41 58 T42 178 T43 142
auto[1] 1723321 1 T41 54 T42 148 T43 140


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2320339 1 T41 80 T42 162 T43 155
auto[1] 1373133 1 T41 32 T42 164 T43 127


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 1278855 1 T41 52 T42 97 T43 78
auto[0] auto[1] 691296 1 T41 6 T42 81 T43 64
auto[1] auto[0] 1041484 1 T41 28 T42 65 T43 77
auto[1] auto[1] 681837 1 T41 26 T42 83 T43 63

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%