Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7458971 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
45737 |
| auto[1] |
5504158 |
1 |
|
|
T1 |
36231 |
|
T11 |
118 |
|
T12 |
6 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10657680 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
69517 |
| auto[1] |
2305449 |
1 |
|
|
T1 |
12451 |
|
T11 |
54 |
|
T16 |
4 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7483937 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
45854 |
| auto[1] |
5479192 |
1 |
|
|
T1 |
36114 |
|
T11 |
124 |
|
T12 |
8 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1566873 |
1 |
|
|
T1 |
11759 |
|
T11 |
48 |
|
T12 |
2 |
| auto[1] |
auto[0] |
auto[1] |
1149094 |
1 |
|
|
T1 |
6429 |
|
T11 |
21 |
|
T16 |
4 |
| auto[1] |
auto[1] |
auto[0] |
1606870 |
1 |
|
|
T1 |
11904 |
|
T11 |
22 |
|
T12 |
6 |
| auto[1] |
auto[1] |
auto[1] |
1156355 |
1 |
|
|
T1 |
6022 |
|
T11 |
33 |
|
T129 |
115 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |