Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7471057 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
43669 |
| auto[1] |
5492072 |
1 |
|
|
T1 |
38299 |
|
T11 |
82 |
|
T12 |
11 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10658224 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
69170 |
| auto[1] |
2304905 |
1 |
|
|
T1 |
12798 |
|
T11 |
36 |
|
T16 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7491155 |
1 |
|
|
T23 |
490 |
|
T24 |
152 |
|
T1 |
45827 |
| auto[1] |
5471974 |
1 |
|
|
T1 |
36141 |
|
T11 |
113 |
|
T16 |
30 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1582461 |
1 |
|
|
T1 |
11299 |
|
T11 |
66 |
|
T16 |
12 |
| auto[1] |
auto[0] |
auto[1] |
1152386 |
1 |
|
|
T1 |
5913 |
|
T11 |
21 |
|
T16 |
1 |
| auto[1] |
auto[1] |
auto[0] |
1584608 |
1 |
|
|
T1 |
12044 |
|
T11 |
11 |
|
T16 |
16 |
| auto[1] |
auto[1] |
auto[1] |
1152519 |
1 |
|
|
T1 |
6885 |
|
T11 |
15 |
|
T16 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |