Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
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Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv



Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 36 0 36 100.00
Crosses 128 0 128 100.00


Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_intr 32 0 32 100.00 100 1 1 0
cp_intr_en 2 0 2 100.00 100 1 1 2
cp_intr_state 2 0 2 100.00 100 1 1 2


Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
intr_cg_cc 128 0 128 100.00 100 1 1 0


Summary for Variable cp_intr

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 32 0 32 100.00


User Defined Bins for cp_intr

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[1] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[2] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[3] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[4] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[5] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[6] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[7] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[8] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[9] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[10] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[11] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[12] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[13] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[14] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[15] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[16] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[17] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[18] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[19] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[20] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[21] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[22] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[23] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[24] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[25] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[26] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[27] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[28] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[29] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[30] 15827605 1 T23 38182 T24 2939 T25 1259
all_values[31] 15827605 1 T23 38182 T24 2939 T25 1259



Summary for Variable cp_intr_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 290901867 1 T23 122182 T24 47150 T25 40288
auto[1] 215581493 1 T24 46898 T30 292 T32 12771



Summary for Variable cp_intr_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_state

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 116631200 1 T23 122182 T24 6924 T25 40288
auto[1] 389852160 1 T24 87124 T30 591 T32 22749



Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for intr_cg_cc

Bins
cp_intrcp_intr_encp_intr_stateCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] auto[0] auto[0] 3002524 1 T23 38182 T24 112 T25 1259
all_values[0] auto[0] auto[1] 6091825 1 T24 1157 T30 8 T32 383
all_values[0] auto[1] auto[0] 649289 1 T24 124 T30 9 T32 53
all_values[0] auto[1] auto[1] 6083967 1 T24 1546 T30 3 T32 306
all_values[1] auto[0] auto[0] 3001384 1 T23 38182 T24 106 T25 1259
all_values[1] auto[0] auto[1] 6054003 1 T24 1185 T30 7 T32 294
all_values[1] auto[1] auto[0] 647122 1 T24 128 T32 118 T113 32
all_values[1] auto[1] auto[1] 6125096 1 T24 1520 T32 357 T113 181
all_values[2] auto[0] auto[0] 2995670 1 T23 38182 T24 120 T25 1259
all_values[2] auto[0] auto[1] 6090172 1 T24 1259 T30 18 T32 286
all_values[2] auto[1] auto[0] 646782 1 T24 84 T32 50 T113 51
all_values[2] auto[1] auto[1] 6094981 1 T24 1476 T32 417 T113 173
all_values[3] auto[0] auto[0] 2997571 1 T23 38182 T24 101 T25 1259
all_values[3] auto[0] auto[1] 6123056 1 T24 1652 T30 6 T32 311
all_values[3] auto[1] auto[0] 646558 1 T24 87 T30 10 T32 51
all_values[3] auto[1] auto[1] 6060420 1 T24 1099 T30 11 T32 371
all_values[4] auto[0] auto[0] 2995583 1 T23 38182 T24 67 T25 1259
all_values[4] auto[0] auto[1] 6097196 1 T24 1170 T30 2 T32 386
all_values[4] auto[1] auto[0] 641286 1 T24 182 T30 10 T32 51
all_values[4] auto[1] auto[1] 6093540 1 T24 1520 T30 11 T32 267
all_values[5] auto[0] auto[0] 2999420 1 T23 38182 T24 187 T25 1259
all_values[5] auto[0] auto[1] 6096535 1 T24 1604 T30 22 T32 353
all_values[5] auto[1] auto[0] 648327 1 T24 117 T32 20 T113 33
all_values[5] auto[1] auto[1] 6083323 1 T24 1031 T32 387 T113 91
all_values[6] auto[0] auto[0] 2999822 1 T23 38182 T24 130 T25 1259
all_values[6] auto[0] auto[1] 6095577 1 T24 1226 T30 14 T32 351
all_values[6] auto[1] auto[0] 650083 1 T24 150 T30 5 T32 106
all_values[6] auto[1] auto[1] 6082123 1 T24 1433 T32 332 T113 147
all_values[7] auto[0] auto[0] 2997864 1 T23 38182 T24 164 T25 1259
all_values[7] auto[0] auto[1] 6094503 1 T24 1370 T30 9 T32 415
all_values[7] auto[1] auto[0] 635559 1 T24 119 T30 4 T32 24
all_values[7] auto[1] auto[1] 6099679 1 T24 1286 T30 17 T32 324
all_values[8] auto[0] auto[0] 3000187 1 T23 38182 T24 119 T25 1259
all_values[8] auto[0] auto[1] 6094818 1 T24 1197 T30 7 T32 354
all_values[8] auto[1] auto[0] 645691 1 T24 130 T30 5 T32 62
all_values[8] auto[1] auto[1] 6086909 1 T24 1493 T30 9 T32 351
all_values[9] auto[0] auto[0] 2995491 1 T23 38182 T24 98 T25 1259
all_values[9] auto[0] auto[1] 6097420 1 T24 1232 T30 9 T32 345
all_values[9] auto[1] auto[0] 652116 1 T24 94 T30 10 T32 46
all_values[9] auto[1] auto[1] 6082578 1 T24 1515 T30 6 T32 337
all_values[10] auto[0] auto[0] 2996234 1 T23 38182 T24 75 T25 1259
all_values[10] auto[0] auto[1] 6112516 1 T24 1361 T30 9 T32 294
all_values[10] auto[1] auto[0] 639889 1 T24 112 T32 18 T113 31
all_values[10] auto[1] auto[1] 6078966 1 T24 1391 T32 462 T113 177
all_values[11] auto[0] auto[0] 3004110 1 T23 38182 T24 92 T25 1259
all_values[11] auto[0] auto[1] 6057712 1 T24 1356 T30 21 T32 387
all_values[11] auto[1] auto[0] 652965 1 T24 81 T32 52 T113 26
all_values[11] auto[1] auto[1] 6112818 1 T24 1410 T32 341 T113 180
all_values[12] auto[0] auto[0] 2997645 1 T23 38182 T24 94 T25 1259
all_values[12] auto[0] auto[1] 6076752 1 T24 1642 T30 9 T32 389
all_values[12] auto[1] auto[0] 646020 1 T24 41 T30 5 T32 45
all_values[12] auto[1] auto[1] 6107188 1 T24 1162 T30 9 T32 323
all_values[13] auto[0] auto[0] 2991824 1 T23 38182 T24 103 T25 1259
all_values[13] auto[0] auto[1] 6074532 1 T24 1633 T30 12 T32 319
all_values[13] auto[1] auto[0] 660210 1 T24 115 T30 1 T32 83
all_values[13] auto[1] auto[1] 6101039 1 T24 1088 T30 4 T32 359
all_values[14] auto[0] auto[0] 2990557 1 T23 38182 T24 113 T25 1259
all_values[14] auto[0] auto[1] 6087293 1 T24 1246 T30 24 T32 380
all_values[14] auto[1] auto[0] 639217 1 T24 88 T32 57 T113 49
all_values[14] auto[1] auto[1] 6110538 1 T24 1492 T32 293 T113 190
all_values[15] auto[0] auto[0] 2994248 1 T23 38182 T24 89 T25 1259
all_values[15] auto[0] auto[1] 6101565 1 T24 1129 T30 15 T32 465
all_values[15] auto[1] auto[0] 646621 1 T24 143 T32 32 T113 23
all_values[15] auto[1] auto[1] 6085171 1 T24 1578 T30 9 T32 257
all_values[16] auto[0] auto[0] 2996470 1 T23 38182 T24 62 T25 1259
all_values[16] auto[0] auto[1] 6102806 1 T24 1255 T30 8 T32 344
all_values[16] auto[1] auto[0] 648703 1 T24 171 T30 4 T32 28
all_values[16] auto[1] auto[1] 6079626 1 T24 1451 T30 12 T32 430
all_values[17] auto[0] auto[0] 2996850 1 T23 38182 T24 61 T25 1259
all_values[17] auto[0] auto[1] 6112738 1 T24 1395 T30 17 T32 351
all_values[17] auto[1] auto[0] 652912 1 T24 133 T30 5 T32 49
all_values[17] auto[1] auto[1] 6065105 1 T24 1350 T32 386 T113 207
all_values[18] auto[0] auto[0] 3000868 1 T23 38182 T24 83 T25 1259
all_values[18] auto[0] auto[1] 6071945 1 T24 1438 T30 11 T32 305
all_values[18] auto[1] auto[0] 649091 1 T24 78 T30 7 T32 28
all_values[18] auto[1] auto[1] 6105701 1 T24 1340 T32 468 T113 157
all_values[19] auto[0] auto[0] 2995309 1 T23 38182 T24 78 T25 1259
all_values[19] auto[0] auto[1] 6116877 1 T24 1284 T30 17 T32 426
all_values[19] auto[1] auto[0] 643529 1 T24 59 T30 1 T32 13
all_values[19] auto[1] auto[1] 6071890 1 T24 1518 T30 4 T32 316
all_values[20] auto[0] auto[0] 3003346 1 T23 38182 T24 145 T25 1259
all_values[20] auto[0] auto[1] 6081638 1 T24 1277 T30 11 T32 384
all_values[20] auto[1] auto[0] 646067 1 T24 140 T30 3 T32 75
all_values[20] auto[1] auto[1] 6096554 1 T24 1377 T30 13 T32 306
all_values[21] auto[0] auto[0] 2992312 1 T23 38182 T24 212 T25 1259
all_values[21] auto[0] auto[1] 6066489 1 T24 1493 T30 18 T32 357
all_values[21] auto[1] auto[0] 653079 1 T24 107 T30 5 T32 56
all_values[21] auto[1] auto[1] 6115725 1 T24 1127 T32 339 T113 158
all_values[22] auto[0] auto[0] 2998751 1 T23 38182 T24 128 T25 1259
all_values[22] auto[0] auto[1] 6120472 1 T24 1121 T30 15 T32 360
all_values[22] auto[1] auto[0] 650346 1 T24 82 T30 1 T32 47
all_values[22] auto[1] auto[1] 6058036 1 T24 1608 T30 4 T32 348
all_values[23] auto[0] auto[0] 3007375 1 T23 38182 T24 125 T25 1259
all_values[23] auto[0] auto[1] 6111738 1 T24 1392 T30 11 T32 352
all_values[23] auto[1] auto[0] 635393 1 T24 144 T30 2 T32 46
all_values[23] auto[1] auto[1] 6073099 1 T24 1278 T30 7 T32 362
all_values[24] auto[0] auto[0] 2998976 1 T23 38182 T24 84 T25 1259
all_values[24] auto[0] auto[1] 6118952 1 T24 1664 T30 8 T32 318
all_values[24] auto[1] auto[0] 642401 1 T24 47 T30 1 T32 116
all_values[24] auto[1] auto[1] 6067276 1 T24 1144 T30 13 T32 340
all_values[25] auto[0] auto[0] 2996750 1 T23 38182 T24 54 T25 1259
all_values[25] auto[0] auto[1] 6082531 1 T24 1201 T30 7 T32 372
all_values[25] auto[1] auto[0] 641433 1 T24 76 T32 42 T113 39
all_values[25] auto[1] auto[1] 6106891 1 T24 1608 T30 9 T32 357
all_values[26] auto[0] auto[0] 3002140 1 T23 38182 T24 159 T25 1259
all_values[26] auto[0] auto[1] 6074956 1 T24 1447 T30 12 T32 316
all_values[26] auto[1] auto[0] 642012 1 T24 59 T30 2 T32 51
all_values[26] auto[1] auto[1] 6108497 1 T24 1274 T30 12 T32 416
all_values[27] auto[0] auto[0] 3002504 1 T23 38182 T24 94 T25 1259
all_values[27] auto[0] auto[1] 6075240 1 T24 1320 T30 18 T32 336
all_values[27] auto[1] auto[0] 643549 1 T24 83 T32 65 T113 62
all_values[27] auto[1] auto[1] 6106312 1 T24 1442 T30 7 T32 360
all_values[28] auto[0] auto[0] 3006137 1 T23 38182 T24 152 T25 1259
all_values[28] auto[0] auto[1] 6082626 1 T24 1549 T30 9 T32 467
all_values[28] auto[1] auto[0] 638883 1 T24 66 T32 14 T113 2
all_values[28] auto[1] auto[1] 6099959 1 T24 1172 T30 9 T32 263
all_values[29] auto[0] auto[0] 3014506 1 T23 38182 T24 107 T25 1259
all_values[29] auto[0] auto[1] 6094581 1 T24 1302 T30 16 T32 416
all_values[29] auto[1] auto[0] 644325 1 T24 138 T30 2 T32 61
all_values[29] auto[1] auto[1] 6074193 1 T24 1392 T30 10 T32 298
all_values[30] auto[0] auto[0] 2991598 1 T23 38182 T24 147 T25 1259
all_values[30] auto[0] auto[1] 6109357 1 T24 1548 T30 20 T32 304
all_values[30] auto[1] auto[0] 645265 1 T24 153 T32 31 T113 65
all_values[30] auto[1] auto[1] 6081385 1 T24 1091 T32 452 T113 202
all_values[31] auto[0] auto[0] 2997595 1 T23 38182 T24 58 T25 1259
all_values[31] auto[0] auto[1] 6071825 1 T24 1526 T30 6 T32 487
all_values[31] auto[1] auto[0] 644856 1 T24 74 T30 5 T32 39
all_values[31] auto[1] auto[1] 6113329 1 T24 1281 T30 16 T32 217

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