Group : gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg
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Group : gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_gpio_env_0.1/gpio_env_cov.sv



Summary for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 36 0 36 100.00
Crosses 128 0 128 100.00


Variables for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_pin 32 0 32 100.00 100 1 1 0
data_in 2 0 2 100.00 100 1 1 2
gpio_value 2 0 2 100.00 100 1 1 2


Crosses for Group gpio_env_pkg::gpio_env_cov::gpio_pins_data_in_cross_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_cross_pins_data_in 128 0 128 100.00 100 1 1 0


Summary for Variable cp_pin

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 32 0 32 100.00


User Defined Bins for cp_pin

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
bins_for_gpio_bits[0] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[1] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[2] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[3] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[4] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[5] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[6] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[7] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[8] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[9] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[10] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[11] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[12] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[13] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[14] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[15] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[16] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[17] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[18] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[19] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[20] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[21] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[22] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[23] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[24] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[25] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[26] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[27] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[28] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[29] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[30] 14604595 1 T21 111212 T22 123833 T23 792
bins_for_gpio_bits[31] 14604595 1 T21 111212 T22 123833 T23 792



Summary for Variable data_in

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for data_in

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 277213936 1 T21 127017 T22 137418 T23 19420
auto[1] 190133104 1 T21 228861 T22 258847 T23 5924



Summary for Variable gpio_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for gpio_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 277206064 1 T21 127034 T22 137439 T23 19420
auto[1] 190140976 1 T21 228844 T22 258826 T23 5924



Summary for Cross cp_cross_pins_data_in

Samples crossed: cp_pin gpio_value data_in
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cp_cross_pins_data_in

Bins
cp_pingpio_valuedata_inCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
bins_for_gpio_bits[0] auto[0] auto[0] 8385474 1 T21 37581 T22 40526 T23 578
bins_for_gpio_bits[0] auto[0] auto[1] 263396 1 T21 2094 T22 2374 T23 22
bins_for_gpio_bits[0] auto[1] auto[0] 263612 1 T21 2087 T22 2369 T23 22
bins_for_gpio_bits[0] auto[1] auto[1] 5692113 1 T21 69450 T22 78564 T23 170
bins_for_gpio_bits[1] auto[0] auto[0] 8405086 1 T21 37832 T22 40621 T23 625
bins_for_gpio_bits[1] auto[0] auto[1] 262829 1 T21 2077 T22 2423 T23 11
bins_for_gpio_bits[1] auto[1] auto[0] 263110 1 T21 2072 T22 2414 T23 11
bins_for_gpio_bits[1] auto[1] auto[1] 5673570 1 T21 69231 T22 78375 T23 145
bins_for_gpio_bits[2] auto[0] auto[0] 8395116 1 T21 37284 T22 40401 T23 586
bins_for_gpio_bits[2] auto[0] auto[1] 263782 1 T21 2019 T22 2436 T23 19
bins_for_gpio_bits[2] auto[1] auto[0] 264049 1 T21 2016 T22 2427 T23 19
bins_for_gpio_bits[2] auto[1] auto[1] 5681648 1 T21 69893 T22 78569 T23 168
bins_for_gpio_bits[3] auto[0] auto[0] 8390159 1 T21 37126 T22 40963 T23 596
bins_for_gpio_bits[3] auto[0] auto[1] 263659 1 T21 2009 T22 2437 T23 18
bins_for_gpio_bits[3] auto[1] auto[0] 263924 1 T21 2004 T22 2430 T23 18
bins_for_gpio_bits[3] auto[1] auto[1] 5686853 1 T21 70073 T22 78003 T23 160
bins_for_gpio_bits[4] auto[0] auto[0] 8397275 1 T21 37210 T22 40667 T23 598
bins_for_gpio_bits[4] auto[0] auto[1] 263939 1 T21 2074 T22 2432 T23 18
bins_for_gpio_bits[4] auto[1] auto[0] 264166 1 T21 2066 T22 2427 T23 18
bins_for_gpio_bits[4] auto[1] auto[1] 5679215 1 T21 69862 T22 78307 T23 158
bins_for_gpio_bits[5] auto[0] auto[0] 8391177 1 T21 37966 T22 40632 T23 582
bins_for_gpio_bits[5] auto[0] auto[1] 263473 1 T21 2075 T22 2385 T23 22
bins_for_gpio_bits[5] auto[1] auto[0] 263741 1 T21 2070 T22 2379 T23 22
bins_for_gpio_bits[5] auto[1] auto[1] 5686204 1 T21 69101 T22 78437 T23 166
bins_for_gpio_bits[6] auto[0] auto[0] 8398695 1 T21 37886 T22 40505 T23 594
bins_for_gpio_bits[6] auto[0] auto[1] 263565 1 T21 2027 T22 2413 T23 22
bins_for_gpio_bits[6] auto[1] auto[0] 263805 1 T21 2023 T22 2405 T23 22
bins_for_gpio_bits[6] auto[1] auto[1] 5678530 1 T21 69276 T22 78510 T23 154
bins_for_gpio_bits[7] auto[0] auto[0] 8404836 1 T21 37570 T22 40454 T23 550
bins_for_gpio_bits[7] auto[0] auto[1] 263217 1 T21 2086 T22 2450 T23 26
bins_for_gpio_bits[7] auto[1] auto[0] 263474 1 T21 2077 T22 2441 T23 26
bins_for_gpio_bits[7] auto[1] auto[1] 5673068 1 T21 69479 T22 78488 T23 190
bins_for_gpio_bits[8] auto[0] auto[0] 8398254 1 T21 37346 T22 40836 T23 605
bins_for_gpio_bits[8] auto[0] auto[1] 263491 1 T21 2016 T22 2406 T23 18
bins_for_gpio_bits[8] auto[1] auto[0] 263702 1 T21 2009 T22 2396 T23 18
bins_for_gpio_bits[8] auto[1] auto[1] 5679148 1 T21 69841 T22 78195 T23 151
bins_for_gpio_bits[9] auto[0] auto[0] 8388198 1 T21 37720 T22 40583 T23 582
bins_for_gpio_bits[9] auto[0] auto[1] 263816 1 T21 2070 T22 2417 T23 24
bins_for_gpio_bits[9] auto[1] auto[0] 264082 1 T21 2063 T22 2412 T23 24
bins_for_gpio_bits[9] auto[1] auto[1] 5688499 1 T21 69359 T22 78421 T23 162
bins_for_gpio_bits[10] auto[0] auto[0] 8403584 1 T21 37493 T22 40568 T23 579
bins_for_gpio_bits[10] auto[0] auto[1] 263493 1 T21 2021 T22 2398 T23 15
bins_for_gpio_bits[10] auto[1] auto[0] 263762 1 T21 2014 T22 2391 T23 15
bins_for_gpio_bits[10] auto[1] auto[1] 5673756 1 T21 69684 T22 78476 T23 183
bins_for_gpio_bits[11] auto[0] auto[0] 8400356 1 T21 38384 T22 40324 T23 562
bins_for_gpio_bits[11] auto[0] auto[1] 263638 1 T21 2147 T22 2367 T23 24
bins_for_gpio_bits[11] auto[1] auto[0] 263870 1 T21 2142 T22 2361 T23 24
bins_for_gpio_bits[11] auto[1] auto[1] 5676731 1 T21 68539 T22 78781 T23 182
bins_for_gpio_bits[12] auto[0] auto[0] 8397344 1 T21 37742 T22 40965 T23 542
bins_for_gpio_bits[12] auto[0] auto[1] 263237 1 T21 2073 T22 2457 T23 21
bins_for_gpio_bits[12] auto[1] auto[0] 263498 1 T21 2069 T22 2447 T23 21
bins_for_gpio_bits[12] auto[1] auto[1] 5680516 1 T21 69328 T22 77964 T23 208
bins_for_gpio_bits[13] auto[0] auto[0] 8389997 1 T21 37245 T22 40701 T23 569
bins_for_gpio_bits[13] auto[0] auto[1] 263465 1 T21 2033 T22 2425 T23 19
bins_for_gpio_bits[13] auto[1] auto[0] 263710 1 T21 2026 T22 2417 T23 19
bins_for_gpio_bits[13] auto[1] auto[1] 5687423 1 T21 69908 T22 78290 T23 185
bins_for_gpio_bits[14] auto[0] auto[0] 8395590 1 T21 37883 T22 40289 T23 624
bins_for_gpio_bits[14] auto[0] auto[1] 263929 1 T21 2080 T22 2353 T23 15
bins_for_gpio_bits[14] auto[1] auto[0] 264192 1 T21 2078 T22 2349 T23 15
bins_for_gpio_bits[14] auto[1] auto[1] 5680884 1 T21 69171 T22 78842 T23 138
bins_for_gpio_bits[15] auto[0] auto[0] 8401164 1 T21 37474 T22 40864 T23 570
bins_for_gpio_bits[15] auto[0] auto[1] 263192 1 T21 2043 T22 2491 T23 21
bins_for_gpio_bits[15] auto[1] auto[0] 263446 1 T21 2040 T22 2488 T23 21
bins_for_gpio_bits[15] auto[1] auto[1] 5676793 1 T21 69655 T22 77990 T23 180
bins_for_gpio_bits[16] auto[0] auto[0] 8398063 1 T21 37487 T22 40024 T23 607
bins_for_gpio_bits[16] auto[0] auto[1] 263585 1 T21 2054 T22 2380 T23 20
bins_for_gpio_bits[16] auto[1] auto[0] 263834 1 T21 2047 T22 2374 T23 20
bins_for_gpio_bits[16] auto[1] auto[1] 5679113 1 T21 69624 T22 79055 T23 145
bins_for_gpio_bits[17] auto[0] auto[0] 8402523 1 T21 38154 T22 40601 T23 582
bins_for_gpio_bits[17] auto[0] auto[1] 264290 1 T21 2072 T22 2424 T23 20
bins_for_gpio_bits[17] auto[1] auto[0] 264494 1 T21 2066 T22 2418 T23 20
bins_for_gpio_bits[17] auto[1] auto[1] 5673288 1 T21 68920 T22 78390 T23 170
bins_for_gpio_bits[18] auto[0] auto[0] 8407451 1 T21 38549 T22 40552 T23 590
bins_for_gpio_bits[18] auto[0] auto[1] 263532 1 T21 2065 T22 2390 T23 19
bins_for_gpio_bits[18] auto[1] auto[0] 263748 1 T21 2060 T22 2387 T23 19
bins_for_gpio_bits[18] auto[1] auto[1] 5669864 1 T21 68538 T22 78504 T23 164
bins_for_gpio_bits[19] auto[0] auto[0] 8391476 1 T21 37837 T22 40235 T23 624
bins_for_gpio_bits[19] auto[0] auto[1] 263621 1 T21 2112 T22 2405 T23 14
bins_for_gpio_bits[19] auto[1] auto[0] 263847 1 T21 2108 T22 2399 T23 14
bins_for_gpio_bits[19] auto[1] auto[1] 5685651 1 T21 69155 T22 78794 T23 140
bins_for_gpio_bits[20] auto[0] auto[0] 8398293 1 T21 37874 T22 40639 T23 599
bins_for_gpio_bits[20] auto[0] auto[1] 263587 1 T21 2068 T22 2411 T23 26
bins_for_gpio_bits[20] auto[1] auto[0] 263831 1 T21 2064 T22 2408 T23 26
bins_for_gpio_bits[20] auto[1] auto[1] 5678884 1 T21 69206 T22 78375 T23 141
bins_for_gpio_bits[21] auto[0] auto[0] 8403511 1 T21 37547 T22 40651 T23 573
bins_for_gpio_bits[21] auto[0] auto[1] 263636 1 T21 2075 T22 2437 T23 21
bins_for_gpio_bits[21] auto[1] auto[0] 263852 1 T21 2068 T22 2433 T23 21
bins_for_gpio_bits[21] auto[1] auto[1] 5673596 1 T21 69522 T22 78312 T23 177
bins_for_gpio_bits[22] auto[0] auto[0] 8411052 1 T21 37276 T22 40407 T23 608
bins_for_gpio_bits[22] auto[0] auto[1] 263607 1 T21 2023 T22 2505 T23 20
bins_for_gpio_bits[22] auto[1] auto[0] 263850 1 T21 2017 T22 2498 T23 20
bins_for_gpio_bits[22] auto[1] auto[1] 5666086 1 T21 69896 T22 78423 T23 144
bins_for_gpio_bits[23] auto[0] auto[0] 8396204 1 T21 37639 T22 40813 T23 580
bins_for_gpio_bits[23] auto[0] auto[1] 263501 1 T21 2022 T22 2467 T23 22
bins_for_gpio_bits[23] auto[1] auto[0] 263784 1 T21 2017 T22 2458 T23 22
bins_for_gpio_bits[23] auto[1] auto[1] 5681106 1 T21 69534 T22 78095 T23 168
bins_for_gpio_bits[24] auto[0] auto[0] 8413492 1 T21 37695 T22 40810 T23 572
bins_for_gpio_bits[24] auto[0] auto[1] 263713 1 T21 2064 T22 2442 T23 21
bins_for_gpio_bits[24] auto[1] auto[0] 263950 1 T21 2061 T22 2436 T23 21
bins_for_gpio_bits[24] auto[1] auto[1] 5663440 1 T21 69392 T22 78145 T23 178
bins_for_gpio_bits[25] auto[0] auto[0] 8402818 1 T21 37201 T22 40693 T23 592
bins_for_gpio_bits[25] auto[0] auto[1] 263073 1 T21 2038 T22 2429 T23 19
bins_for_gpio_bits[25] auto[1] auto[0] 263314 1 T21 2032 T22 2420 T23 19
bins_for_gpio_bits[25] auto[1] auto[1] 5675390 1 T21 69941 T22 78291 T23 162
bins_for_gpio_bits[26] auto[0] auto[0] 8390856 1 T21 37775 T22 40077 T23 564
bins_for_gpio_bits[26] auto[0] auto[1] 263514 1 T21 2068 T22 2402 T23 20
bins_for_gpio_bits[26] auto[1] auto[0] 263761 1 T21 2061 T22 2396 T23 20
bins_for_gpio_bits[26] auto[1] auto[1] 5686464 1 T21 69308 T22 78958 T23 188
bins_for_gpio_bits[27] auto[0] auto[0] 8400685 1 T21 37749 T22 40582 T23 570
bins_for_gpio_bits[27] auto[0] auto[1] 263526 1 T21 2046 T22 2412 T23 20
bins_for_gpio_bits[27] auto[1] auto[0] 263763 1 T21 2039 T22 2405 T23 20
bins_for_gpio_bits[27] auto[1] auto[1] 5676621 1 T21 69378 T22 78434 T23 182
bins_for_gpio_bits[28] auto[0] auto[0] 8402742 1 T21 37899 T22 40299 T23 557
bins_for_gpio_bits[28] auto[0] auto[1] 263526 1 T21 2105 T22 2364 T23 18
bins_for_gpio_bits[28] auto[1] auto[0] 263773 1 T21 2100 T22 2357 T23 18
bins_for_gpio_bits[28] auto[1] auto[1] 5674554 1 T21 69108 T22 78813 T23 199
bins_for_gpio_bits[29] auto[0] auto[0] 8393254 1 T21 37385 T22 40349 T23 602
bins_for_gpio_bits[29] auto[0] auto[1] 264057 1 T21 2066 T22 2368 T23 21
bins_for_gpio_bits[29] auto[1] auto[0] 264289 1 T21 2063 T22 2361 T23 21
bins_for_gpio_bits[29] auto[1] auto[1] 5682995 1 T21 69698 T22 78755 T23 148
bins_for_gpio_bits[30] auto[0] auto[0] 8405475 1 T21 37269 T22 40547 T23 619
bins_for_gpio_bits[30] auto[0] auto[1] 263781 1 T21 1979 T22 2365 T23 19
bins_for_gpio_bits[30] auto[1] auto[0] 264069 1 T21 1975 T22 2360 T23 19
bins_for_gpio_bits[30] auto[1] auto[1] 5671270 1 T21 69989 T22 78561 T23 135
bins_for_gpio_bits[31] auto[0] auto[0] 8411662 1 T21 37388 T22 40007 T23 604
bins_for_gpio_bits[31] auto[0] auto[1] 263532 1 T21 2075 T22 2346 T23 20
bins_for_gpio_bits[31] auto[1] auto[0] 263772 1 T21 2073 T22 2336 T23 20
bins_for_gpio_bits[31] auto[1] auto[1] 5665629 1 T21 69676 T22 79144 T23 148

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