Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8497145 |
1 |
|
|
T21 |
64333 |
|
T22 |
71395 |
|
T23 |
416 |
| auto[1] |
6337524 |
1 |
|
|
T21 |
53077 |
|
T22 |
53255 |
|
T24 |
212 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14029129 |
1 |
|
|
T21 |
110622 |
|
T22 |
117805 |
|
T23 |
416 |
| auto[1] |
805540 |
1 |
|
|
T21 |
6788 |
|
T22 |
6845 |
|
T24 |
14 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8502723 |
1 |
|
|
T21 |
64603 |
|
T22 |
70928 |
|
T23 |
416 |
| auto[1] |
6331946 |
1 |
|
|
T21 |
52807 |
|
T22 |
53722 |
|
T24 |
185 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2775176 |
1 |
|
|
T21 |
22607 |
|
T22 |
23456 |
|
T24 |
72 |
| auto[1] |
auto[0] |
auto[1] |
404661 |
1 |
|
|
T21 |
3378 |
|
T22 |
3458 |
|
T24 |
6 |
| auto[1] |
auto[1] |
auto[0] |
2751230 |
1 |
|
|
T21 |
23412 |
|
T22 |
23421 |
|
T24 |
99 |
| auto[1] |
auto[1] |
auto[1] |
400879 |
1 |
|
|
T21 |
3410 |
|
T22 |
3387 |
|
T24 |
8 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |