Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2760361 |
1 |
|
|
T21 |
22219 |
|
T22 |
26240 |
|
T24 |
61 |
| auto[1] |
auto[0] |
auto[1] |
402045 |
1 |
|
|
T21 |
3268 |
|
T22 |
3886 |
|
T24 |
5 |
| auto[1] |
auto[1] |
auto[0] |
2778015 |
1 |
|
|
T21 |
22274 |
|
T22 |
23249 |
|
T24 |
74 |
| auto[1] |
auto[1] |
auto[1] |
404887 |
1 |
|
|
T21 |
3224 |
|
T22 |
3402 |
|
T24 |
5 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |