Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7854495 |
1 |
|
|
T24 |
1 |
|
T25 |
28951 |
|
T26 |
391 |
| auto[1] |
5651287 |
1 |
|
|
T1 |
42274 |
|
T17 |
221 |
|
T19 |
580 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2466079 |
1 |
|
|
T1 |
17356 |
|
T17 |
85 |
|
T19 |
398 |
| auto[1] |
auto[0] |
auto[1] |
365574 |
1 |
|
|
T1 |
2425 |
|
T17 |
14 |
|
T19 |
87 |
| auto[1] |
auto[1] |
auto[0] |
2455149 |
1 |
|
|
T1 |
19566 |
|
T17 |
98 |
|
T19 |
78 |
| auto[1] |
auto[1] |
auto[1] |
364485 |
1 |
|
|
T1 |
2927 |
|
T17 |
24 |
|
T19 |
17 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |