cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57428 |
1 |
|
|
T22 |
1458 |
|
T16 |
2496 |
|
T105 |
556 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45468 |
1 |
|
|
T22 |
662 |
|
T16 |
1276 |
|
T105 |
322 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54364 |
1 |
|
|
T22 |
2377 |
|
T16 |
1478 |
|
T105 |
341 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48838 |
1 |
|
|
T22 |
736 |
|
T16 |
1173 |
|
T105 |
978 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T22 |
34 |
|
T16 |
55 |
|
T105 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T22 |
33 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T22 |
34 |
|
T16 |
53 |
|
T105 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T22 |
33 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T22 |
33 |
|
T16 |
53 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T22 |
32 |
|
T16 |
47 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T22 |
33 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
32 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T22 |
32 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T22 |
32 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T22 |
32 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T22 |
31 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T22 |
32 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
29 |
|
T16 |
42 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T22 |
31 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T22 |
27 |
|
T16 |
39 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
29 |
|
T16 |
48 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T22 |
26 |
|
T16 |
39 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T22 |
29 |
|
T16 |
48 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T22 |
26 |
|
T16 |
38 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T22 |
28 |
|
T16 |
46 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T22 |
26 |
|
T16 |
36 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T22 |
28 |
|
T16 |
45 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T22 |
26 |
|
T16 |
35 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T22 |
28 |
|
T16 |
45 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T22 |
25 |
|
T16 |
34 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T16 |
21 |
|
T105 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
28 |
|
T16 |
44 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T22 |
23 |
|
T16 |
33 |
|
T105 |
11 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58470 |
1 |
|
|
T22 |
2312 |
|
T16 |
1788 |
|
T105 |
310 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45739 |
1 |
|
|
T22 |
857 |
|
T16 |
1142 |
|
T105 |
357 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59015 |
1 |
|
|
T22 |
1207 |
|
T16 |
2117 |
|
T105 |
1081 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43097 |
1 |
|
|
T22 |
777 |
|
T16 |
1273 |
|
T105 |
428 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T22 |
36 |
|
T16 |
58 |
|
T105 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T16 |
17 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T22 |
34 |
|
T16 |
64 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T16 |
17 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T22 |
33 |
|
T16 |
63 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T22 |
33 |
|
T16 |
61 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T22 |
35 |
|
T16 |
56 |
|
T105 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T22 |
33 |
|
T16 |
60 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T22 |
35 |
|
T16 |
53 |
|
T105 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T22 |
33 |
|
T16 |
58 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T22 |
33 |
|
T16 |
52 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T22 |
33 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T22 |
31 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T22 |
32 |
|
T16 |
55 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T22 |
28 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T22 |
32 |
|
T16 |
54 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T22 |
28 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T22 |
32 |
|
T16 |
54 |
|
T105 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
28 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T22 |
32 |
|
T16 |
51 |
|
T105 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T22 |
27 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T22 |
30 |
|
T16 |
51 |
|
T105 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T22 |
26 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T22 |
26 |
|
T16 |
48 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T22 |
25 |
|
T16 |
46 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T22 |
29 |
|
T16 |
47 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
27 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T22 |
25 |
|
T16 |
44 |
|
T105 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
28 |
|
T16 |
16 |
|
T105 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T22 |
28 |
|
T16 |
46 |
|
T105 |
9 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54663 |
1 |
|
|
T22 |
1991 |
|
T16 |
2117 |
|
T105 |
389 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44838 |
1 |
|
|
T22 |
1218 |
|
T16 |
1042 |
|
T105 |
1174 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59252 |
1 |
|
|
T22 |
1090 |
|
T16 |
2079 |
|
T105 |
175 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46445 |
1 |
|
|
T22 |
683 |
|
T16 |
1215 |
|
T105 |
331 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T22 |
46 |
|
T16 |
51 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
21 |
|
T16 |
21 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T22 |
48 |
|
T16 |
55 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T22 |
46 |
|
T16 |
51 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
21 |
|
T16 |
21 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T22 |
47 |
|
T16 |
52 |
|
T105 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T22 |
46 |
|
T16 |
48 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T22 |
46 |
|
T16 |
52 |
|
T105 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T22 |
46 |
|
T16 |
47 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T22 |
46 |
|
T16 |
52 |
|
T105 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T22 |
45 |
|
T16 |
46 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T22 |
43 |
|
T16 |
52 |
|
T105 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T22 |
45 |
|
T16 |
42 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
43 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T22 |
45 |
|
T16 |
42 |
|
T105 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T22 |
42 |
|
T16 |
50 |
|
T105 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T22 |
44 |
|
T16 |
41 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T22 |
41 |
|
T16 |
49 |
|
T105 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T22 |
44 |
|
T16 |
39 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T22 |
40 |
|
T16 |
48 |
|
T105 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T22 |
42 |
|
T16 |
38 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T22 |
39 |
|
T16 |
48 |
|
T105 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T22 |
42 |
|
T16 |
36 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T22 |
36 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T22 |
42 |
|
T16 |
36 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T22 |
33 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T22 |
42 |
|
T16 |
36 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
31 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T22 |
42 |
|
T16 |
35 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T22 |
29 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T22 |
41 |
|
T16 |
34 |
|
T105 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
21 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
13 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58431 |
1 |
|
|
T22 |
1199 |
|
T16 |
1729 |
|
T105 |
671 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39224 |
1 |
|
|
T22 |
715 |
|
T16 |
1104 |
|
T105 |
240 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64898 |
1 |
|
|
T22 |
2362 |
|
T16 |
2269 |
|
T105 |
447 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42019 |
1 |
|
|
T22 |
831 |
|
T16 |
1186 |
|
T105 |
851 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
26 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T22 |
40 |
|
T16 |
62 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T22 |
39 |
|
T16 |
56 |
|
T105 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
26 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T22 |
40 |
|
T16 |
62 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T22 |
38 |
|
T16 |
55 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
26 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T22 |
40 |
|
T16 |
60 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T22 |
38 |
|
T16 |
54 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
26 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T22 |
40 |
|
T16 |
59 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T22 |
37 |
|
T16 |
53 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T22 |
39 |
|
T16 |
58 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T22 |
36 |
|
T16 |
53 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T22 |
38 |
|
T16 |
53 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T22 |
36 |
|
T16 |
51 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T22 |
35 |
|
T16 |
53 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T22 |
36 |
|
T16 |
51 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T22 |
34 |
|
T16 |
53 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
32 |
|
T16 |
51 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T22 |
34 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
32 |
|
T16 |
49 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T22 |
33 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
30 |
|
T16 |
47 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T22 |
32 |
|
T16 |
46 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T22 |
27 |
|
T16 |
46 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T22 |
31 |
|
T16 |
46 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
27 |
|
T16 |
44 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T22 |
30 |
|
T16 |
45 |
|
T105 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T22 |
26 |
|
T16 |
42 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T22 |
29 |
|
T16 |
45 |
|
T105 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T16 |
19 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T22 |
25 |
|
T16 |
38 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
27 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T22 |
27 |
|
T16 |
42 |
|
T105 |
6 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58622 |
1 |
|
|
T22 |
1877 |
|
T16 |
1998 |
|
T105 |
1194 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45825 |
1 |
|
|
T22 |
1003 |
|
T16 |
1024 |
|
T105 |
134 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54820 |
1 |
|
|
T22 |
1476 |
|
T16 |
1807 |
|
T105 |
528 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45550 |
1 |
|
|
T22 |
870 |
|
T16 |
1319 |
|
T105 |
337 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T22 |
47 |
|
T16 |
60 |
|
T105 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T22 |
46 |
|
T16 |
60 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T22 |
47 |
|
T16 |
59 |
|
T105 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T22 |
46 |
|
T16 |
60 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T22 |
46 |
|
T16 |
59 |
|
T105 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T22 |
46 |
|
T16 |
60 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T22 |
44 |
|
T16 |
56 |
|
T105 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T22 |
44 |
|
T16 |
59 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T22 |
42 |
|
T16 |
55 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T22 |
44 |
|
T16 |
58 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T22 |
39 |
|
T16 |
54 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T22 |
43 |
|
T16 |
58 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T22 |
38 |
|
T16 |
53 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T22 |
43 |
|
T16 |
57 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T22 |
37 |
|
T16 |
53 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T22 |
42 |
|
T16 |
56 |
|
T105 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T22 |
37 |
|
T16 |
50 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T22 |
38 |
|
T16 |
56 |
|
T105 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T22 |
36 |
|
T16 |
48 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T22 |
36 |
|
T16 |
47 |
|
T105 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T22 |
35 |
|
T16 |
54 |
|
T105 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
36 |
|
T16 |
44 |
|
T105 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T22 |
35 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
35 |
|
T16 |
44 |
|
T105 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T22 |
33 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T22 |
35 |
|
T16 |
41 |
|
T105 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T22 |
33 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
16 |
|
T16 |
25 |
|
T105 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T22 |
34 |
|
T16 |
39 |
|
T105 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T22 |
29 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58526 |
1 |
|
|
T22 |
1953 |
|
T16 |
1917 |
|
T105 |
296 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47559 |
1 |
|
|
T22 |
966 |
|
T16 |
1364 |
|
T105 |
362 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61230 |
1 |
|
|
T22 |
1418 |
|
T16 |
951 |
|
T105 |
499 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38583 |
1 |
|
|
T22 |
891 |
|
T16 |
1791 |
|
T105 |
1004 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T22 |
46 |
|
T16 |
77 |
|
T105 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T22 |
45 |
|
T16 |
78 |
|
T105 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T22 |
45 |
|
T16 |
74 |
|
T105 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T22 |
45 |
|
T16 |
77 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
44 |
|
T16 |
72 |
|
T105 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T22 |
45 |
|
T16 |
76 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T22 |
44 |
|
T16 |
69 |
|
T105 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T22 |
43 |
|
T16 |
76 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
42 |
|
T16 |
64 |
|
T105 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
42 |
|
T16 |
74 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T22 |
41 |
|
T16 |
61 |
|
T105 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T22 |
41 |
|
T16 |
72 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T22 |
41 |
|
T16 |
58 |
|
T105 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
41 |
|
T16 |
70 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T22 |
39 |
|
T16 |
57 |
|
T105 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T22 |
38 |
|
T16 |
68 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T22 |
38 |
|
T16 |
56 |
|
T105 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T22 |
37 |
|
T16 |
65 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
37 |
|
T16 |
54 |
|
T105 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
37 |
|
T16 |
64 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T22 |
36 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T22 |
36 |
|
T16 |
62 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T22 |
36 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T22 |
34 |
|
T16 |
60 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T22 |
32 |
|
T16 |
58 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T22 |
30 |
|
T16 |
58 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
17 |
|
T16 |
19 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T22 |
29 |
|
T16 |
56 |
|
T105 |
11 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62808 |
1 |
|
|
T22 |
1534 |
|
T16 |
1553 |
|
T105 |
507 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46443 |
1 |
|
|
T22 |
800 |
|
T16 |
1195 |
|
T105 |
943 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53125 |
1 |
|
|
T22 |
1260 |
|
T16 |
1649 |
|
T105 |
578 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43866 |
1 |
|
|
T22 |
1617 |
|
T16 |
1899 |
|
T105 |
290 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T22 |
39 |
|
T16 |
52 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T22 |
39 |
|
T16 |
50 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
34 |
|
T16 |
55 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
39 |
|
T16 |
49 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T22 |
34 |
|
T16 |
54 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T22 |
39 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T22 |
33 |
|
T16 |
53 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T22 |
38 |
|
T16 |
46 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T22 |
32 |
|
T16 |
51 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T22 |
38 |
|
T16 |
45 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T22 |
32 |
|
T16 |
50 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
36 |
|
T16 |
45 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T22 |
31 |
|
T16 |
50 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T22 |
36 |
|
T16 |
44 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T22 |
29 |
|
T16 |
50 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T22 |
35 |
|
T16 |
42 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T22 |
29 |
|
T16 |
50 |
|
T105 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
33 |
|
T16 |
40 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T22 |
29 |
|
T16 |
49 |
|
T105 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
33 |
|
T16 |
36 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T22 |
28 |
|
T16 |
48 |
|
T105 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T22 |
31 |
|
T16 |
33 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T22 |
28 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T22 |
31 |
|
T16 |
33 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T22 |
28 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T22 |
29 |
|
T16 |
32 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T22 |
28 |
|
T16 |
46 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T22 |
28 |
|
T16 |
32 |
|
T105 |
8 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52863 |
1 |
|
|
T22 |
1018 |
|
T16 |
1432 |
|
T105 |
1337 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44672 |
1 |
|
|
T22 |
1873 |
|
T16 |
1321 |
|
T105 |
243 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64693 |
1 |
|
|
T22 |
1285 |
|
T16 |
2523 |
|
T105 |
422 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43778 |
1 |
|
|
T22 |
992 |
|
T16 |
1050 |
|
T105 |
281 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T22 |
48 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T22 |
43 |
|
T16 |
53 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T22 |
48 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T22 |
43 |
|
T16 |
48 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T22 |
48 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T22 |
43 |
|
T16 |
48 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T22 |
46 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T22 |
43 |
|
T16 |
47 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T22 |
45 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T22 |
42 |
|
T16 |
47 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T22 |
45 |
|
T16 |
54 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T22 |
41 |
|
T16 |
47 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T22 |
44 |
|
T16 |
53 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T22 |
41 |
|
T16 |
45 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
43 |
|
T16 |
52 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T22 |
40 |
|
T16 |
43 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T22 |
42 |
|
T16 |
50 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T22 |
39 |
|
T16 |
41 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T22 |
41 |
|
T16 |
49 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T22 |
38 |
|
T16 |
41 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T22 |
40 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T22 |
37 |
|
T16 |
40 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T22 |
40 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T22 |
36 |
|
T16 |
39 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T22 |
37 |
|
T16 |
48 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T22 |
36 |
|
T16 |
37 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T22 |
35 |
|
T16 |
46 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T22 |
36 |
|
T16 |
35 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T22 |
35 |
|
T16 |
45 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
19 |
|
T16 |
26 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T22 |
34 |
|
T16 |
35 |
|
T105 |
9 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57681 |
1 |
|
|
T22 |
1221 |
|
T16 |
2222 |
|
T105 |
524 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46620 |
1 |
|
|
T22 |
771 |
|
T16 |
1143 |
|
T105 |
329 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56923 |
1 |
|
|
T22 |
2073 |
|
T16 |
1502 |
|
T105 |
262 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44362 |
1 |
|
|
T22 |
1107 |
|
T16 |
1376 |
|
T105 |
1075 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T22 |
46 |
|
T16 |
61 |
|
T105 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
20 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T22 |
44 |
|
T16 |
60 |
|
T105 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T22 |
44 |
|
T16 |
61 |
|
T105 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
20 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T22 |
44 |
|
T16 |
58 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T22 |
44 |
|
T16 |
59 |
|
T105 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T22 |
44 |
|
T16 |
58 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
42 |
|
T16 |
57 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
44 |
|
T16 |
57 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T22 |
42 |
|
T16 |
53 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T22 |
43 |
|
T16 |
56 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
39 |
|
T16 |
52 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
43 |
|
T16 |
55 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T22 |
38 |
|
T16 |
51 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T22 |
43 |
|
T16 |
55 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T22 |
42 |
|
T16 |
53 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T22 |
32 |
|
T16 |
47 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T22 |
42 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T22 |
31 |
|
T16 |
46 |
|
T105 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T22 |
41 |
|
T16 |
51 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T22 |
31 |
|
T16 |
46 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T22 |
41 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
29 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T22 |
41 |
|
T16 |
48 |
|
T105 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T22 |
27 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T22 |
41 |
|
T16 |
47 |
|
T105 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T22 |
26 |
|
T16 |
43 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T22 |
40 |
|
T16 |
47 |
|
T105 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T22 |
26 |
|
T16 |
41 |
|
T105 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T22 |
40 |
|
T16 |
45 |
|
T105 |
11 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57968 |
1 |
|
|
T22 |
1567 |
|
T16 |
2037 |
|
T105 |
394 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43251 |
1 |
|
|
T22 |
708 |
|
T16 |
1820 |
|
T105 |
361 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59959 |
1 |
|
|
T22 |
2511 |
|
T16 |
1499 |
|
T105 |
221 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43932 |
1 |
|
|
T22 |
555 |
|
T16 |
987 |
|
T105 |
1207 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T22 |
34 |
|
T16 |
50 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T22 |
32 |
|
T16 |
55 |
|
T105 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T22 |
33 |
|
T16 |
48 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T22 |
31 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T22 |
33 |
|
T16 |
47 |
|
T105 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T22 |
29 |
|
T16 |
53 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T22 |
31 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T22 |
28 |
|
T16 |
53 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T22 |
28 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T22 |
28 |
|
T16 |
53 |
|
T105 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T22 |
28 |
|
T16 |
42 |
|
T105 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T22 |
26 |
|
T16 |
52 |
|
T105 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T22 |
28 |
|
T16 |
39 |
|
T105 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T22 |
26 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T22 |
27 |
|
T16 |
39 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T22 |
24 |
|
T16 |
50 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T22 |
27 |
|
T16 |
38 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T22 |
23 |
|
T16 |
50 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
27 |
|
T16 |
38 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T22 |
23 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T22 |
27 |
|
T16 |
36 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T22 |
19 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
27 |
|
T16 |
34 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T22 |
17 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
27 |
|
T16 |
34 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T22 |
17 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T22 |
27 |
|
T16 |
32 |
|
T105 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T22 |
16 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T22 |
27 |
|
T16 |
30 |
|
T105 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
27 |
|
T16 |
24 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T22 |
16 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63178 |
1 |
|
|
T22 |
1961 |
|
T16 |
1621 |
|
T105 |
574 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47800 |
1 |
|
|
T22 |
1358 |
|
T16 |
1117 |
|
T105 |
868 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52042 |
1 |
|
|
T22 |
784 |
|
T16 |
1698 |
|
T105 |
723 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41764 |
1 |
|
|
T22 |
878 |
|
T16 |
1912 |
|
T105 |
235 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
15 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T22 |
58 |
|
T16 |
49 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T22 |
54 |
|
T16 |
55 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
15 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T22 |
58 |
|
T16 |
49 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T22 |
50 |
|
T16 |
53 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
15 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T22 |
57 |
|
T16 |
48 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T22 |
49 |
|
T16 |
53 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
15 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T22 |
57 |
|
T16 |
46 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T22 |
47 |
|
T16 |
50 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T22 |
57 |
|
T16 |
43 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T22 |
45 |
|
T16 |
49 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T22 |
56 |
|
T16 |
43 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T22 |
44 |
|
T16 |
46 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T22 |
55 |
|
T16 |
42 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T22 |
43 |
|
T16 |
46 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T22 |
54 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T22 |
54 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
53 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T22 |
39 |
|
T16 |
45 |
|
T105 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T22 |
51 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T22 |
38 |
|
T16 |
45 |
|
T105 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
50 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T22 |
38 |
|
T16 |
45 |
|
T105 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T22 |
49 |
|
T16 |
39 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T22 |
37 |
|
T16 |
43 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T22 |
48 |
|
T16 |
37 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T22 |
36 |
|
T16 |
41 |
|
T105 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T22 |
46 |
|
T16 |
36 |
|
T105 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T22 |
35 |
|
T16 |
41 |
|
T105 |
4 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57197 |
1 |
|
|
T22 |
884 |
|
T16 |
1355 |
|
T105 |
605 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45692 |
1 |
|
|
T22 |
2042 |
|
T16 |
1248 |
|
T105 |
904 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58824 |
1 |
|
|
T22 |
1042 |
|
T16 |
2264 |
|
T105 |
552 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45279 |
1 |
|
|
T22 |
1216 |
|
T16 |
1426 |
|
T105 |
187 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T22 |
13 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T22 |
52 |
|
T16 |
60 |
|
T105 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
14 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T22 |
50 |
|
T16 |
60 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T22 |
13 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T22 |
52 |
|
T16 |
59 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
14 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T22 |
49 |
|
T16 |
60 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T22 |
13 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
49 |
|
T16 |
59 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
49 |
|
T16 |
60 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T22 |
13 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T22 |
48 |
|
T16 |
57 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T22 |
49 |
|
T16 |
59 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T22 |
46 |
|
T16 |
56 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
48 |
|
T16 |
58 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T22 |
45 |
|
T16 |
55 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T22 |
47 |
|
T16 |
57 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T22 |
43 |
|
T16 |
55 |
|
T105 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T22 |
47 |
|
T16 |
55 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
43 |
|
T16 |
52 |
|
T105 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
45 |
|
T16 |
53 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T22 |
42 |
|
T16 |
52 |
|
T105 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T22 |
45 |
|
T16 |
52 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T22 |
41 |
|
T16 |
52 |
|
T105 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T22 |
44 |
|
T16 |
49 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
39 |
|
T16 |
51 |
|
T105 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T22 |
44 |
|
T16 |
48 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T22 |
39 |
|
T16 |
49 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
42 |
|
T16 |
47 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T22 |
38 |
|
T16 |
46 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T22 |
41 |
|
T16 |
47 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T22 |
38 |
|
T16 |
45 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T22 |
40 |
|
T16 |
46 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
12 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T22 |
35 |
|
T16 |
43 |
|
T105 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T22 |
14 |
|
T16 |
20 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T22 |
39 |
|
T16 |
45 |
|
T105 |
7 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53352 |
1 |
|
|
T22 |
716 |
|
T16 |
1514 |
|
T105 |
300 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52194 |
1 |
|
|
T22 |
1963 |
|
T16 |
2438 |
|
T105 |
1249 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50405 |
1 |
|
|
T22 |
1084 |
|
T16 |
1239 |
|
T105 |
191 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48123 |
1 |
|
|
T22 |
1151 |
|
T16 |
968 |
|
T105 |
347 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T22 |
56 |
|
T16 |
65 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T22 |
53 |
|
T16 |
68 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T22 |
56 |
|
T16 |
65 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T22 |
52 |
|
T16 |
65 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T22 |
55 |
|
T16 |
64 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T22 |
51 |
|
T16 |
65 |
|
T105 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T22 |
54 |
|
T16 |
63 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T22 |
50 |
|
T16 |
65 |
|
T105 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T22 |
54 |
|
T16 |
61 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T22 |
50 |
|
T16 |
65 |
|
T105 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T22 |
52 |
|
T16 |
61 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T22 |
50 |
|
T16 |
63 |
|
T105 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T22 |
50 |
|
T16 |
60 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T22 |
50 |
|
T16 |
61 |
|
T105 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T22 |
48 |
|
T16 |
57 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T22 |
49 |
|
T16 |
60 |
|
T105 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
48 |
|
T16 |
57 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T22 |
49 |
|
T16 |
58 |
|
T105 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T22 |
45 |
|
T16 |
54 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T22 |
49 |
|
T16 |
56 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T22 |
45 |
|
T16 |
53 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T22 |
45 |
|
T16 |
51 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T22 |
45 |
|
T16 |
51 |
|
T105 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T22 |
44 |
|
T16 |
48 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T22 |
44 |
|
T16 |
51 |
|
T105 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T22 |
43 |
|
T16 |
48 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T22 |
42 |
|
T16 |
50 |
|
T105 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T22 |
42 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
17 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T22 |
41 |
|
T16 |
48 |
|
T105 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
19 |
|
T16 |
18 |
|
T105 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T22 |
41 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60148 |
1 |
|
|
T22 |
1234 |
|
T16 |
1247 |
|
T105 |
343 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43449 |
1 |
|
|
T22 |
973 |
|
T16 |
2081 |
|
T105 |
363 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50646 |
1 |
|
|
T22 |
2079 |
|
T16 |
1535 |
|
T105 |
266 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50876 |
1 |
|
|
T22 |
991 |
|
T16 |
1520 |
|
T105 |
1155 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T22 |
43 |
|
T16 |
62 |
|
T105 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
18 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T22 |
42 |
|
T16 |
63 |
|
T105 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T22 |
42 |
|
T16 |
61 |
|
T105 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
18 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T22 |
40 |
|
T16 |
63 |
|
T105 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T22 |
42 |
|
T16 |
60 |
|
T105 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T22 |
38 |
|
T16 |
60 |
|
T105 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T22 |
42 |
|
T16 |
59 |
|
T105 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T22 |
37 |
|
T16 |
58 |
|
T105 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T22 |
42 |
|
T16 |
58 |
|
T105 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T22 |
36 |
|
T16 |
56 |
|
T105 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
42 |
|
T16 |
57 |
|
T105 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T22 |
35 |
|
T16 |
53 |
|
T105 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T22 |
41 |
|
T16 |
55 |
|
T105 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T22 |
35 |
|
T16 |
53 |
|
T105 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T22 |
41 |
|
T16 |
50 |
|
T105 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T22 |
33 |
|
T16 |
53 |
|
T105 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T22 |
41 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T22 |
33 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T22 |
40 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T22 |
30 |
|
T16 |
51 |
|
T105 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T22 |
40 |
|
T16 |
47 |
|
T105 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T22 |
30 |
|
T16 |
50 |
|
T105 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T22 |
37 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T22 |
36 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T22 |
35 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
17 |
|
T16 |
18 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T22 |
33 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
18 |
|
T16 |
16 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
29 |
|
T16 |
48 |
|
T105 |
14 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59326 |
1 |
|
|
T22 |
1424 |
|
T16 |
2140 |
|
T105 |
507 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45480 |
1 |
|
|
T22 |
790 |
|
T16 |
1478 |
|
T105 |
966 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55345 |
1 |
|
|
T22 |
1279 |
|
T16 |
1442 |
|
T105 |
367 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45449 |
1 |
|
|
T22 |
1715 |
|
T16 |
1031 |
|
T105 |
391 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T22 |
42 |
|
T16 |
68 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
19 |
|
T16 |
28 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T22 |
43 |
|
T16 |
61 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T22 |
41 |
|
T16 |
68 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
19 |
|
T16 |
28 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T22 |
42 |
|
T16 |
60 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T22 |
41 |
|
T16 |
68 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T22 |
42 |
|
T16 |
59 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
38 |
|
T16 |
67 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T22 |
42 |
|
T16 |
58 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
38 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T22 |
41 |
|
T16 |
56 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T22 |
38 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
41 |
|
T16 |
53 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T22 |
38 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T22 |
39 |
|
T16 |
51 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T22 |
37 |
|
T16 |
65 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T22 |
38 |
|
T16 |
49 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
37 |
|
T16 |
63 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T22 |
37 |
|
T16 |
45 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T22 |
35 |
|
T16 |
62 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T22 |
37 |
|
T16 |
43 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T22 |
34 |
|
T16 |
61 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T22 |
36 |
|
T16 |
41 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T22 |
32 |
|
T16 |
60 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T22 |
36 |
|
T16 |
36 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T22 |
32 |
|
T16 |
57 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T22 |
36 |
|
T16 |
36 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T22 |
32 |
|
T16 |
57 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T22 |
36 |
|
T16 |
35 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T16 |
21 |
|
T105 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T22 |
29 |
|
T16 |
57 |
|
T105 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
19 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T22 |
35 |
|
T16 |
35 |
|
T105 |
9 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60182 |
1 |
|
|
T22 |
1162 |
|
T16 |
768 |
|
T105 |
908 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50788 |
1 |
|
|
T22 |
1270 |
|
T16 |
2321 |
|
T105 |
326 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55009 |
1 |
|
|
T22 |
1650 |
|
T16 |
1165 |
|
T105 |
632 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40553 |
1 |
|
|
T22 |
1117 |
|
T16 |
1721 |
|
T105 |
358 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
17 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T22 |
50 |
|
T16 |
72 |
|
T105 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T22 |
55 |
|
T16 |
75 |
|
T105 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
17 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
50 |
|
T16 |
70 |
|
T105 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T22 |
55 |
|
T16 |
75 |
|
T105 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
17 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T22 |
46 |
|
T16 |
69 |
|
T105 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T22 |
51 |
|
T16 |
74 |
|
T105 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T22 |
17 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T22 |
43 |
|
T16 |
67 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T22 |
47 |
|
T16 |
74 |
|
T105 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T22 |
40 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
46 |
|
T16 |
72 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T22 |
39 |
|
T16 |
65 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T22 |
46 |
|
T16 |
71 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
39 |
|
T16 |
65 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
46 |
|
T16 |
69 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T22 |
39 |
|
T16 |
65 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
43 |
|
T16 |
68 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T22 |
38 |
|
T16 |
63 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
43 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T22 |
38 |
|
T16 |
61 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T22 |
43 |
|
T16 |
66 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T22 |
38 |
|
T16 |
58 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T22 |
43 |
|
T16 |
66 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
38 |
|
T16 |
58 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T22 |
41 |
|
T16 |
63 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T22 |
38 |
|
T16 |
58 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T22 |
40 |
|
T16 |
60 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T22 |
37 |
|
T16 |
53 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T22 |
39 |
|
T16 |
58 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
16 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T22 |
34 |
|
T16 |
52 |
|
T105 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
12 |
|
T16 |
17 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T22 |
39 |
|
T16 |
53 |
|
T105 |
10 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57804 |
1 |
|
|
T22 |
1543 |
|
T16 |
2202 |
|
T105 |
562 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39324 |
1 |
|
|
T22 |
675 |
|
T16 |
1477 |
|
T105 |
114 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61171 |
1 |
|
|
T22 |
2427 |
|
T16 |
1057 |
|
T105 |
625 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48311 |
1 |
|
|
T22 |
783 |
|
T16 |
1382 |
|
T105 |
1013 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T22 |
32 |
|
T16 |
71 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T22 |
34 |
|
T16 |
66 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T22 |
30 |
|
T16 |
70 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T22 |
34 |
|
T16 |
65 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T22 |
29 |
|
T16 |
68 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T22 |
34 |
|
T16 |
62 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
29 |
|
T16 |
65 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T22 |
33 |
|
T16 |
62 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T22 |
28 |
|
T16 |
65 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T22 |
32 |
|
T16 |
62 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T22 |
28 |
|
T16 |
61 |
|
T105 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T22 |
32 |
|
T16 |
62 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T22 |
26 |
|
T16 |
58 |
|
T105 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T22 |
30 |
|
T16 |
60 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T22 |
25 |
|
T16 |
58 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T22 |
30 |
|
T16 |
58 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T22 |
25 |
|
T16 |
57 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T22 |
30 |
|
T16 |
57 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T22 |
24 |
|
T16 |
56 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T22 |
30 |
|
T16 |
54 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
24 |
|
T16 |
56 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T22 |
30 |
|
T16 |
54 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T22 |
24 |
|
T16 |
55 |
|
T105 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T22 |
28 |
|
T16 |
54 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T22 |
22 |
|
T16 |
53 |
|
T105 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
28 |
|
T16 |
52 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T22 |
22 |
|
T16 |
52 |
|
T105 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T22 |
27 |
|
T16 |
51 |
|
T105 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
22 |
|
T16 |
18 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T22 |
22 |
|
T16 |
51 |
|
T105 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T16 |
22 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T22 |
27 |
|
T16 |
47 |
|
T105 |
7 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61934 |
1 |
|
|
T22 |
1279 |
|
T16 |
1740 |
|
T105 |
215 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43226 |
1 |
|
|
T22 |
1030 |
|
T16 |
1850 |
|
T105 |
376 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56042 |
1 |
|
|
T22 |
1457 |
|
T16 |
1689 |
|
T105 |
284 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46487 |
1 |
|
|
T22 |
1586 |
|
T16 |
1110 |
|
T105 |
1215 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T22 |
39 |
|
T16 |
54 |
|
T105 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T22 |
41 |
|
T16 |
52 |
|
T105 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T22 |
37 |
|
T16 |
54 |
|
T105 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T22 |
39 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T22 |
37 |
|
T16 |
54 |
|
T105 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T22 |
37 |
|
T16 |
48 |
|
T105 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T22 |
37 |
|
T16 |
53 |
|
T105 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T22 |
36 |
|
T16 |
46 |
|
T105 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T22 |
37 |
|
T16 |
52 |
|
T105 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
34 |
|
T16 |
45 |
|
T105 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T22 |
35 |
|
T16 |
52 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T22 |
33 |
|
T16 |
45 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T22 |
35 |
|
T16 |
50 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T22 |
33 |
|
T16 |
44 |
|
T105 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
34 |
|
T16 |
48 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
31 |
|
T16 |
43 |
|
T105 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T22 |
34 |
|
T16 |
47 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T22 |
29 |
|
T16 |
42 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T22 |
34 |
|
T16 |
44 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T22 |
34 |
|
T16 |
44 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T22 |
26 |
|
T16 |
41 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T22 |
34 |
|
T16 |
44 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T22 |
25 |
|
T16 |
39 |
|
T105 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T22 |
34 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T22 |
23 |
|
T16 |
38 |
|
T105 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T22 |
34 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T22 |
23 |
|
T16 |
38 |
|
T105 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T22 |
31 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
18 |
|
T16 |
25 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T22 |
21 |
|
T16 |
36 |
|
T105 |
13 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61340 |
1 |
|
|
T22 |
1394 |
|
T16 |
1063 |
|
T105 |
1156 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43919 |
1 |
|
|
T22 |
1823 |
|
T16 |
1623 |
|
T105 |
410 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54820 |
1 |
|
|
T22 |
1365 |
|
T16 |
2369 |
|
T105 |
221 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46324 |
1 |
|
|
T22 |
735 |
|
T16 |
1253 |
|
T105 |
381 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T22 |
42 |
|
T16 |
59 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T22 |
43 |
|
T16 |
57 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T22 |
42 |
|
T16 |
59 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T22 |
43 |
|
T16 |
57 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T22 |
41 |
|
T16 |
57 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T22 |
40 |
|
T16 |
57 |
|
T105 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T22 |
41 |
|
T16 |
57 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T22 |
38 |
|
T16 |
54 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T22 |
40 |
|
T16 |
55 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T22 |
36 |
|
T16 |
54 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
40 |
|
T16 |
55 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T22 |
36 |
|
T16 |
53 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T22 |
38 |
|
T16 |
54 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T22 |
35 |
|
T16 |
51 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T22 |
38 |
|
T16 |
54 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T22 |
35 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T22 |
35 |
|
T16 |
53 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T22 |
35 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T22 |
35 |
|
T16 |
52 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T22 |
34 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
34 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T22 |
33 |
|
T16 |
43 |
|
T105 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T22 |
34 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T22 |
30 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
34 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T22 |
33 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T22 |
27 |
|
T16 |
40 |
|
T105 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
18 |
|
T16 |
20 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T22 |
33 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
16 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T22 |
27 |
|
T16 |
39 |
|
T105 |
12 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60213 |
1 |
|
|
T22 |
1742 |
|
T16 |
1180 |
|
T105 |
425 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41189 |
1 |
|
|
T22 |
884 |
|
T16 |
1496 |
|
T105 |
1002 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55098 |
1 |
|
|
T22 |
1385 |
|
T16 |
1119 |
|
T105 |
275 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48236 |
1 |
|
|
T22 |
1101 |
|
T16 |
2275 |
|
T105 |
337 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T22 |
56 |
|
T16 |
72 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T22 |
54 |
|
T16 |
69 |
|
T105 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T22 |
53 |
|
T16 |
68 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T22 |
53 |
|
T16 |
64 |
|
T105 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T22 |
52 |
|
T16 |
67 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T22 |
50 |
|
T16 |
63 |
|
T105 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T22 |
52 |
|
T16 |
65 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T22 |
47 |
|
T16 |
62 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T22 |
50 |
|
T16 |
64 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T22 |
46 |
|
T16 |
60 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
45 |
|
T16 |
63 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
45 |
|
T16 |
60 |
|
T105 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T22 |
45 |
|
T16 |
63 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T22 |
45 |
|
T16 |
60 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T22 |
43 |
|
T16 |
61 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T22 |
45 |
|
T16 |
59 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
42 |
|
T16 |
60 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
45 |
|
T16 |
58 |
|
T105 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T22 |
41 |
|
T16 |
59 |
|
T105 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T22 |
45 |
|
T16 |
57 |
|
T105 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T22 |
40 |
|
T16 |
57 |
|
T105 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T22 |
45 |
|
T16 |
56 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T22 |
40 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T22 |
45 |
|
T16 |
52 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T22 |
36 |
|
T16 |
54 |
|
T105 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T22 |
45 |
|
T16 |
52 |
|
T105 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T22 |
36 |
|
T16 |
51 |
|
T105 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T22 |
42 |
|
T16 |
51 |
|
T105 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
14 |
|
T16 |
19 |
|
T105 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
15 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
42 |
|
T16 |
51 |
|
T105 |
12 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54969 |
1 |
|
|
T22 |
2054 |
|
T16 |
1286 |
|
T105 |
217 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47537 |
1 |
|
|
T22 |
827 |
|
T16 |
1812 |
|
T105 |
557 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55398 |
1 |
|
|
T22 |
1422 |
|
T16 |
1601 |
|
T105 |
1011 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46276 |
1 |
|
|
T22 |
877 |
|
T16 |
1546 |
|
T105 |
274 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
19 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T22 |
47 |
|
T16 |
60 |
|
T105 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T22 |
44 |
|
T16 |
59 |
|
T105 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
19 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T22 |
45 |
|
T16 |
59 |
|
T105 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T22 |
44 |
|
T16 |
59 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T22 |
43 |
|
T16 |
59 |
|
T105 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T22 |
43 |
|
T16 |
58 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T22 |
42 |
|
T16 |
58 |
|
T105 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T22 |
39 |
|
T16 |
57 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T22 |
42 |
|
T16 |
56 |
|
T105 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T22 |
39 |
|
T16 |
56 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T22 |
41 |
|
T16 |
52 |
|
T105 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T22 |
38 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T22 |
40 |
|
T16 |
50 |
|
T105 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T22 |
37 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T22 |
38 |
|
T16 |
46 |
|
T105 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
37 |
|
T16 |
54 |
|
T105 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
38 |
|
T16 |
45 |
|
T105 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T22 |
36 |
|
T16 |
53 |
|
T105 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T22 |
36 |
|
T16 |
44 |
|
T105 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T22 |
36 |
|
T16 |
53 |
|
T105 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
36 |
|
T16 |
43 |
|
T105 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T22 |
34 |
|
T16 |
51 |
|
T105 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T22 |
36 |
|
T16 |
42 |
|
T105 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T22 |
34 |
|
T16 |
50 |
|
T105 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T22 |
34 |
|
T16 |
40 |
|
T105 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
31 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T22 |
33 |
|
T16 |
37 |
|
T105 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T22 |
31 |
|
T16 |
49 |
|
T105 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T22 |
33 |
|
T16 |
35 |
|
T105 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T16 |
24 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T22 |
31 |
|
T16 |
48 |
|
T105 |
10 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56025 |
1 |
|
|
T22 |
795 |
|
T16 |
2678 |
|
T105 |
173 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45888 |
1 |
|
|
T22 |
1975 |
|
T16 |
1038 |
|
T105 |
330 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57579 |
1 |
|
|
T22 |
1667 |
|
T16 |
1726 |
|
T105 |
1054 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45890 |
1 |
|
|
T22 |
787 |
|
T16 |
955 |
|
T105 |
525 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
14 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T22 |
50 |
|
T16 |
52 |
|
T105 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T22 |
46 |
|
T16 |
52 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
14 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T22 |
49 |
|
T16 |
51 |
|
T105 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T22 |
44 |
|
T16 |
49 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
14 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T22 |
47 |
|
T16 |
51 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T22 |
43 |
|
T16 |
48 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
14 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T22 |
46 |
|
T16 |
51 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T22 |
43 |
|
T16 |
46 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T22 |
46 |
|
T16 |
50 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
46 |
|
T16 |
50 |
|
T105 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T22 |
46 |
|
T16 |
50 |
|
T105 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
39 |
|
T16 |
43 |
|
T105 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T22 |
46 |
|
T16 |
49 |
|
T105 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T22 |
38 |
|
T16 |
43 |
|
T105 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T22 |
46 |
|
T16 |
48 |
|
T105 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T22 |
37 |
|
T16 |
39 |
|
T105 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
45 |
|
T16 |
47 |
|
T105 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T22 |
36 |
|
T16 |
39 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T22 |
43 |
|
T16 |
46 |
|
T105 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
36 |
|
T16 |
37 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T22 |
40 |
|
T16 |
44 |
|
T105 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
30 |
|
T16 |
36 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T22 |
40 |
|
T16 |
42 |
|
T105 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T22 |
30 |
|
T16 |
34 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T22 |
39 |
|
T16 |
40 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T22 |
28 |
|
T16 |
34 |
|
T105 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
13 |
|
T16 |
25 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T22 |
38 |
|
T16 |
40 |
|
T105 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
17 |
|
T16 |
25 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T22 |
28 |
|
T16 |
34 |
|
T105 |
14 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49885 |
1 |
|
|
T22 |
1152 |
|
T16 |
1284 |
|
T105 |
201 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48087 |
1 |
|
|
T22 |
822 |
|
T16 |
1162 |
|
T105 |
338 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57778 |
1 |
|
|
T22 |
1879 |
|
T16 |
1853 |
|
T105 |
1048 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48697 |
1 |
|
|
T22 |
1247 |
|
T16 |
1937 |
|
T105 |
495 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
15 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T22 |
54 |
|
T16 |
61 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
15 |
|
T16 |
31 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T22 |
54 |
|
T16 |
55 |
|
T105 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
15 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T22 |
54 |
|
T16 |
55 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
15 |
|
T16 |
31 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T22 |
53 |
|
T16 |
53 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
15 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T22 |
50 |
|
T16 |
54 |
|
T105 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T22 |
53 |
|
T16 |
52 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
15 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T22 |
49 |
|
T16 |
53 |
|
T105 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T22 |
52 |
|
T16 |
51 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T22 |
48 |
|
T16 |
52 |
|
T105 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T22 |
51 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T22 |
44 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T22 |
51 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
43 |
|
T16 |
49 |
|
T105 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T22 |
51 |
|
T16 |
49 |
|
T105 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T22 |
42 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T22 |
49 |
|
T16 |
48 |
|
T105 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T22 |
47 |
|
T16 |
47 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T22 |
46 |
|
T16 |
44 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T22 |
38 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
46 |
|
T16 |
44 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T22 |
36 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T22 |
46 |
|
T16 |
43 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T22 |
34 |
|
T16 |
42 |
|
T105 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T22 |
43 |
|
T16 |
43 |
|
T105 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T22 |
34 |
|
T16 |
42 |
|
T105 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
43 |
|
T16 |
42 |
|
T105 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
14 |
|
T16 |
24 |
|
T105 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T22 |
32 |
|
T16 |
42 |
|
T105 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
15 |
|
T16 |
30 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T22 |
41 |
|
T16 |
41 |
|
T105 |
17 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53334 |
1 |
|
|
T22 |
697 |
|
T16 |
1730 |
|
T105 |
1012 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53460 |
1 |
|
|
T22 |
1078 |
|
T16 |
1064 |
|
T105 |
259 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57475 |
1 |
|
|
T22 |
2112 |
|
T16 |
2554 |
|
T105 |
409 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41333 |
1 |
|
|
T22 |
1313 |
|
T16 |
1026 |
|
T105 |
459 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T22 |
49 |
|
T16 |
52 |
|
T105 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T22 |
19 |
|
T16 |
32 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T22 |
44 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T22 |
49 |
|
T16 |
50 |
|
T105 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T22 |
19 |
|
T16 |
32 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T22 |
43 |
|
T16 |
47 |
|
T105 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T22 |
47 |
|
T16 |
49 |
|
T105 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T22 |
42 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T22 |
46 |
|
T16 |
48 |
|
T105 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T22 |
41 |
|
T16 |
43 |
|
T105 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T22 |
46 |
|
T16 |
47 |
|
T105 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
40 |
|
T16 |
43 |
|
T105 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T22 |
46 |
|
T16 |
47 |
|
T105 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T22 |
40 |
|
T16 |
42 |
|
T105 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
41 |
|
T16 |
45 |
|
T105 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
39 |
|
T16 |
41 |
|
T105 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T22 |
40 |
|
T16 |
44 |
|
T105 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T22 |
39 |
|
T16 |
40 |
|
T105 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T22 |
40 |
|
T16 |
42 |
|
T105 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T22 |
39 |
|
T16 |
39 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T22 |
40 |
|
T16 |
42 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T22 |
38 |
|
T16 |
38 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
39 |
|
T16 |
40 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T22 |
38 |
|
T16 |
35 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
38 |
|
T16 |
40 |
|
T105 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
37 |
|
T16 |
34 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T22 |
37 |
|
T16 |
40 |
|
T105 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T22 |
35 |
|
T16 |
31 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T22 |
36 |
|
T16 |
39 |
|
T105 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T22 |
35 |
|
T16 |
31 |
|
T105 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
14 |
|
T16 |
26 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T22 |
34 |
|
T16 |
39 |
|
T105 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T22 |
19 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T22 |
34 |
|
T16 |
31 |
|
T105 |
13 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57519 |
1 |
|
|
T22 |
1365 |
|
T16 |
1576 |
|
T105 |
689 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44436 |
1 |
|
|
T22 |
957 |
|
T16 |
1366 |
|
T105 |
971 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57786 |
1 |
|
|
T22 |
2012 |
|
T16 |
2193 |
|
T105 |
428 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45507 |
1 |
|
|
T22 |
883 |
|
T16 |
1171 |
|
T105 |
144 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T22 |
43 |
|
T16 |
56 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T22 |
41 |
|
T16 |
59 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T22 |
43 |
|
T16 |
55 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T22 |
38 |
|
T16 |
59 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T22 |
43 |
|
T16 |
54 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T22 |
36 |
|
T16 |
57 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T22 |
40 |
|
T16 |
54 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T22 |
35 |
|
T16 |
57 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T22 |
40 |
|
T16 |
54 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T22 |
32 |
|
T16 |
57 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T22 |
39 |
|
T16 |
53 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T22 |
32 |
|
T16 |
55 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T22 |
39 |
|
T16 |
50 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T22 |
32 |
|
T16 |
54 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
38 |
|
T16 |
50 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T22 |
30 |
|
T16 |
52 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T22 |
38 |
|
T16 |
50 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T22 |
30 |
|
T16 |
49 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T22 |
38 |
|
T16 |
50 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T22 |
30 |
|
T16 |
47 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T22 |
37 |
|
T16 |
49 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T22 |
30 |
|
T16 |
45 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T22 |
37 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T22 |
30 |
|
T16 |
43 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
35 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T22 |
29 |
|
T16 |
41 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
35 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T22 |
28 |
|
T16 |
38 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
20 |
|
T16 |
23 |
|
T105 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T22 |
34 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T16 |
21 |
|
T105 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T22 |
28 |
|
T16 |
36 |
|
T105 |
5 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60034 |
1 |
|
|
T22 |
1191 |
|
T16 |
2733 |
|
T105 |
1231 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43323 |
1 |
|
|
T22 |
1075 |
|
T16 |
792 |
|
T105 |
282 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57131 |
1 |
|
|
T22 |
2073 |
|
T16 |
1461 |
|
T105 |
301 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44986 |
1 |
|
|
T22 |
798 |
|
T16 |
1476 |
|
T105 |
333 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
20 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T22 |
45 |
|
T16 |
44 |
|
T105 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
23 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T22 |
42 |
|
T16 |
43 |
|
T105 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
20 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T22 |
43 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T22 |
23 |
|
T16 |
30 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T22 |
42 |
|
T16 |
43 |
|
T105 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
20 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T22 |
42 |
|
T16 |
40 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T22 |
41 |
|
T16 |
43 |
|
T105 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
20 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T22 |
42 |
|
T16 |
39 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T22 |
40 |
|
T16 |
43 |
|
T105 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T22 |
41 |
|
T16 |
39 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T22 |
39 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T22 |
40 |
|
T16 |
38 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T22 |
39 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T22 |
39 |
|
T16 |
38 |
|
T105 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T22 |
37 |
|
T16 |
42 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T22 |
38 |
|
T16 |
36 |
|
T105 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T22 |
37 |
|
T16 |
42 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T22 |
38 |
|
T16 |
36 |
|
T105 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T22 |
36 |
|
T16 |
40 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T22 |
38 |
|
T16 |
35 |
|
T105 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T22 |
35 |
|
T16 |
40 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
38 |
|
T16 |
35 |
|
T105 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T22 |
35 |
|
T16 |
39 |
|
T105 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T22 |
38 |
|
T16 |
33 |
|
T105 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T22 |
34 |
|
T16 |
37 |
|
T105 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T22 |
37 |
|
T16 |
30 |
|
T105 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T22 |
30 |
|
T16 |
36 |
|
T105 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T22 |
35 |
|
T16 |
30 |
|
T105 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T22 |
30 |
|
T16 |
36 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
19 |
|
T16 |
29 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T22 |
35 |
|
T16 |
26 |
|
T105 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T16 |
29 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T22 |
30 |
|
T16 |
36 |
|
T105 |
9 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56382 |
1 |
|
|
T22 |
1377 |
|
T16 |
1751 |
|
T105 |
360 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48239 |
1 |
|
|
T22 |
1598 |
|
T16 |
1265 |
|
T105 |
1260 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55917 |
1 |
|
|
T22 |
1586 |
|
T16 |
1415 |
|
T105 |
459 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44696 |
1 |
|
|
T22 |
839 |
|
T16 |
1956 |
|
T105 |
152 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T22 |
22 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T22 |
34 |
|
T16 |
55 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T22 |
34 |
|
T16 |
56 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T22 |
22 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T22 |
33 |
|
T16 |
53 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T22 |
32 |
|
T16 |
53 |
|
T105 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T22 |
22 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T22 |
32 |
|
T16 |
53 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T22 |
32 |
|
T16 |
53 |
|
T105 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T22 |
22 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T22 |
31 |
|
T16 |
52 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T22 |
32 |
|
T16 |
50 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
29 |
|
T16 |
52 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T22 |
32 |
|
T16 |
49 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T22 |
28 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T22 |
31 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T22 |
28 |
|
T16 |
49 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T22 |
31 |
|
T16 |
47 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T22 |
28 |
|
T16 |
47 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T22 |
29 |
|
T16 |
46 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T22 |
27 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T22 |
28 |
|
T16 |
44 |
|
T105 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T22 |
27 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T22 |
28 |
|
T16 |
43 |
|
T105 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T22 |
27 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T22 |
28 |
|
T16 |
43 |
|
T105 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T22 |
27 |
|
T16 |
45 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T22 |
27 |
|
T16 |
42 |
|
T105 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T22 |
27 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T22 |
27 |
|
T16 |
41 |
|
T105 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T22 |
26 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T22 |
26 |
|
T16 |
39 |
|
T105 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T22 |
21 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T22 |
26 |
|
T16 |
43 |
|
T105 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
21 |
|
T16 |
22 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T22 |
26 |
|
T16 |
39 |
|
T105 |
8 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52802 |
1 |
|
|
T22 |
1534 |
|
T16 |
1687 |
|
T105 |
309 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45569 |
1 |
|
|
T22 |
1713 |
|
T16 |
1014 |
|
T105 |
242 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60436 |
1 |
|
|
T22 |
1136 |
|
T16 |
1587 |
|
T105 |
1281 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46564 |
1 |
|
|
T22 |
905 |
|
T16 |
2011 |
|
T105 |
304 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
24 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T22 |
37 |
|
T16 |
46 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
21 |
|
T16 |
29 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T22 |
39 |
|
T16 |
52 |
|
T105 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
24 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T22 |
37 |
|
T16 |
44 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
21 |
|
T16 |
29 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T22 |
39 |
|
T16 |
52 |
|
T105 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T22 |
36 |
|
T16 |
43 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T22 |
37 |
|
T16 |
51 |
|
T105 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T22 |
34 |
|
T16 |
43 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T22 |
35 |
|
T16 |
49 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
33 |
|
T16 |
42 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T22 |
34 |
|
T16 |
49 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T22 |
31 |
|
T16 |
40 |
|
T105 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T22 |
34 |
|
T16 |
48 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T22 |
31 |
|
T16 |
38 |
|
T105 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T22 |
34 |
|
T16 |
47 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T22 |
30 |
|
T16 |
36 |
|
T105 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
34 |
|
T16 |
47 |
|
T105 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T22 |
28 |
|
T16 |
36 |
|
T105 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T22 |
33 |
|
T16 |
45 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T22 |
26 |
|
T16 |
35 |
|
T105 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T22 |
33 |
|
T16 |
43 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T22 |
26 |
|
T16 |
34 |
|
T105 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T22 |
32 |
|
T16 |
41 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
26 |
|
T16 |
34 |
|
T105 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T22 |
32 |
|
T16 |
40 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T22 |
25 |
|
T16 |
34 |
|
T105 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T22 |
30 |
|
T16 |
39 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T22 |
25 |
|
T16 |
34 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T22 |
30 |
|
T16 |
38 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
23 |
|
T16 |
34 |
|
T105 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T22 |
25 |
|
T16 |
33 |
|
T105 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T16 |
28 |
|
T105 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T22 |
29 |
|
T16 |
38 |
|
T105 |
8 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55355 |
1 |
|
|
T22 |
1145 |
|
T16 |
2343 |
|
T105 |
401 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47271 |
1 |
|
|
T22 |
1617 |
|
T16 |
1271 |
|
T105 |
458 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59815 |
1 |
|
|
T22 |
1326 |
|
T16 |
1740 |
|
T105 |
300 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42950 |
1 |
|
|
T22 |
1098 |
|
T16 |
1010 |
|
T105 |
1016 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T22 |
44 |
|
T16 |
61 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T22 |
45 |
|
T16 |
57 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T22 |
44 |
|
T16 |
60 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T22 |
44 |
|
T16 |
56 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T22 |
44 |
|
T16 |
60 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T22 |
43 |
|
T16 |
54 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T22 |
41 |
|
T16 |
60 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T22 |
43 |
|
T16 |
53 |
|
T105 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T22 |
40 |
|
T16 |
58 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T22 |
43 |
|
T16 |
50 |
|
T105 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T22 |
38 |
|
T16 |
58 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T22 |
42 |
|
T16 |
46 |
|
T105 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T22 |
38 |
|
T16 |
57 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T22 |
42 |
|
T16 |
44 |
|
T105 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T22 |
38 |
|
T16 |
56 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T22 |
40 |
|
T16 |
44 |
|
T105 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T22 |
36 |
|
T16 |
54 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T22 |
39 |
|
T16 |
41 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T22 |
36 |
|
T16 |
53 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T22 |
38 |
|
T16 |
40 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T22 |
35 |
|
T16 |
51 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T22 |
38 |
|
T16 |
38 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T22 |
32 |
|
T16 |
50 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T22 |
38 |
|
T16 |
37 |
|
T105 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T22 |
31 |
|
T16 |
49 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
37 |
|
T16 |
37 |
|
T105 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T22 |
31 |
|
T16 |
48 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T22 |
37 |
|
T16 |
36 |
|
T105 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
19 |
|
T16 |
19 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T22 |
29 |
|
T16 |
46 |
|
T105 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
18 |
|
T16 |
23 |
|
T105 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T22 |
36 |
|
T16 |
34 |
|
T105 |
10 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53281 |
1 |
|
|
T22 |
1396 |
|
T16 |
1274 |
|
T105 |
434 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46592 |
1 |
|
|
T22 |
886 |
|
T16 |
1131 |
|
T105 |
279 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54995 |
1 |
|
|
T22 |
1309 |
|
T16 |
1797 |
|
T105 |
1104 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49946 |
1 |
|
|
T22 |
1592 |
|
T16 |
2104 |
|
T105 |
254 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T22 |
38 |
|
T16 |
53 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
23 |
|
T16 |
28 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T22 |
41 |
|
T16 |
52 |
|
T105 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T22 |
38 |
|
T16 |
50 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
23 |
|
T16 |
28 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T22 |
39 |
|
T16 |
51 |
|
T105 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T22 |
38 |
|
T16 |
49 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T22 |
39 |
|
T16 |
51 |
|
T105 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T22 |
38 |
|
T16 |
49 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T22 |
37 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T22 |
36 |
|
T16 |
48 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T22 |
37 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T22 |
36 |
|
T16 |
47 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T22 |
36 |
|
T16 |
49 |
|
T105 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T22 |
34 |
|
T16 |
46 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T22 |
33 |
|
T16 |
48 |
|
T105 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T22 |
33 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T22 |
31 |
|
T16 |
48 |
|
T105 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T22 |
32 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T22 |
30 |
|
T16 |
47 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T22 |
32 |
|
T16 |
43 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T22 |
30 |
|
T16 |
46 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T22 |
32 |
|
T16 |
42 |
|
T105 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T22 |
29 |
|
T16 |
45 |
|
T105 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
32 |
|
T16 |
41 |
|
T105 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T22 |
28 |
|
T16 |
44 |
|
T105 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T22 |
31 |
|
T16 |
41 |
|
T105 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T22 |
27 |
|
T16 |
44 |
|
T105 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T22 |
31 |
|
T16 |
39 |
|
T105 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
26 |
|
T16 |
43 |
|
T105 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
25 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T22 |
31 |
|
T16 |
38 |
|
T105 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
23 |
|
T16 |
27 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T22 |
25 |
|
T16 |
41 |
|
T105 |
11 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61992 |
1 |
|
|
T22 |
2241 |
|
T16 |
1824 |
|
T105 |
672 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46853 |
1 |
|
|
T22 |
948 |
|
T16 |
1658 |
|
T105 |
938 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56318 |
1 |
|
|
T22 |
1174 |
|
T16 |
2126 |
|
T105 |
346 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41112 |
1 |
|
|
T22 |
811 |
|
T16 |
944 |
|
T105 |
220 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T22 |
44 |
|
T16 |
40 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
20 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T22 |
43 |
|
T16 |
39 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T22 |
42 |
|
T16 |
38 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
20 |
|
T16 |
31 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T22 |
42 |
|
T16 |
39 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T22 |
41 |
|
T16 |
37 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T22 |
41 |
|
T16 |
37 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T22 |
41 |
|
T16 |
37 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T22 |
41 |
|
T16 |
35 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T22 |
40 |
|
T16 |
36 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T22 |
41 |
|
T16 |
35 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T22 |
39 |
|
T16 |
36 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
41 |
|
T16 |
35 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T22 |
39 |
|
T16 |
35 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T22 |
39 |
|
T16 |
35 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T22 |
38 |
|
T16 |
33 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T22 |
38 |
|
T16 |
34 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T22 |
37 |
|
T16 |
33 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T22 |
36 |
|
T16 |
34 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T22 |
37 |
|
T16 |
33 |
|
T105 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T22 |
36 |
|
T16 |
34 |
|
T105 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T22 |
37 |
|
T16 |
32 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T22 |
35 |
|
T16 |
34 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T22 |
36 |
|
T16 |
32 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T22 |
34 |
|
T16 |
33 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T22 |
35 |
|
T16 |
31 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T22 |
33 |
|
T16 |
33 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T22 |
34 |
|
T16 |
27 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T22 |
31 |
|
T16 |
33 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T22 |
32 |
|
T16 |
26 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
20 |
|
T16 |
30 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T22 |
30 |
|
T16 |
32 |
|
T105 |
9 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58458 |
1 |
|
|
T22 |
2086 |
|
T16 |
1738 |
|
T105 |
258 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45146 |
1 |
|
|
T22 |
1037 |
|
T16 |
1253 |
|
T105 |
429 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55329 |
1 |
|
|
T22 |
1244 |
|
T16 |
1427 |
|
T105 |
1082 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47786 |
1 |
|
|
T22 |
827 |
|
T16 |
1948 |
|
T105 |
359 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T22 |
41 |
|
T16 |
57 |
|
T105 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T22 |
40 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
41 |
|
T16 |
56 |
|
T105 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T22 |
38 |
|
T16 |
53 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T22 |
41 |
|
T16 |
56 |
|
T105 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T22 |
38 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T22 |
39 |
|
T16 |
56 |
|
T105 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T22 |
37 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T22 |
37 |
|
T16 |
55 |
|
T105 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T22 |
36 |
|
T16 |
51 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T22 |
37 |
|
T16 |
54 |
|
T105 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T22 |
36 |
|
T16 |
48 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T22 |
35 |
|
T16 |
52 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T22 |
35 |
|
T16 |
47 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T22 |
34 |
|
T16 |
52 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T22 |
34 |
|
T16 |
46 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T22 |
33 |
|
T16 |
51 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T22 |
31 |
|
T16 |
46 |
|
T105 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T22 |
33 |
|
T16 |
49 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T22 |
31 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
32 |
|
T16 |
48 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T22 |
28 |
|
T16 |
44 |
|
T105 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T22 |
32 |
|
T16 |
48 |
|
T105 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T22 |
32 |
|
T16 |
46 |
|
T105 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T22 |
28 |
|
T16 |
41 |
|
T105 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T22 |
32 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T22 |
26 |
|
T16 |
41 |
|
T105 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
23 |
|
T16 |
20 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T22 |
32 |
|
T16 |
45 |
|
T105 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T22 |
23 |
|
T16 |
23 |
|
T105 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T22 |
26 |
|
T16 |
41 |
|
T105 |
11 |