Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8381676 |
1 |
|
|
T22 |
1308 |
|
T23 |
66440 |
|
T24 |
1 |
| auto[1] |
6261216 |
1 |
|
|
T23 |
51656 |
|
T25 |
197980 |
|
T1 |
42209 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13846667 |
1 |
|
|
T22 |
1308 |
|
T23 |
110948 |
|
T24 |
1 |
| auto[1] |
796225 |
1 |
|
|
T23 |
7148 |
|
T25 |
25998 |
|
T1 |
5231 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8357760 |
1 |
|
|
T22 |
1308 |
|
T23 |
63564 |
|
T24 |
1 |
| auto[1] |
6285132 |
1 |
|
|
T23 |
54532 |
|
T25 |
199727 |
|
T1 |
39658 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2744559 |
1 |
|
|
T23 |
23670 |
|
T25 |
88168 |
|
T1 |
15912 |
| auto[1] |
auto[0] |
auto[1] |
397833 |
1 |
|
|
T23 |
3518 |
|
T25 |
13360 |
|
T1 |
2316 |
| auto[1] |
auto[1] |
auto[0] |
2744348 |
1 |
|
|
T23 |
23714 |
|
T25 |
85561 |
|
T1 |
18515 |
| auto[1] |
auto[1] |
auto[1] |
398392 |
1 |
|
|
T23 |
3630 |
|
T25 |
12638 |
|
T1 |
2915 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |