Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8398042 |
1 |
|
|
T22 |
1308 |
|
T23 |
65307 |
|
T24 |
1 |
| auto[1] |
6244850 |
1 |
|
|
T23 |
52789 |
|
T25 |
201554 |
|
T1 |
41211 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13847505 |
1 |
|
|
T22 |
1308 |
|
T23 |
111177 |
|
T24 |
1 |
| auto[1] |
795387 |
1 |
|
|
T23 |
6919 |
|
T25 |
27081 |
|
T1 |
4992 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8365024 |
1 |
|
|
T22 |
1308 |
|
T23 |
65456 |
|
T24 |
1 |
| auto[1] |
6277868 |
1 |
|
|
T23 |
52640 |
|
T25 |
204943 |
|
T1 |
38811 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2759499 |
1 |
|
|
T23 |
22832 |
|
T25 |
92037 |
|
T1 |
16631 |
| auto[1] |
auto[0] |
auto[1] |
400418 |
1 |
|
|
T23 |
3442 |
|
T25 |
14198 |
|
T1 |
2457 |
| auto[1] |
auto[1] |
auto[0] |
2722982 |
1 |
|
|
T23 |
22889 |
|
T25 |
85825 |
|
T1 |
17188 |
| auto[1] |
auto[1] |
auto[1] |
394969 |
1 |
|
|
T23 |
3477 |
|
T25 |
12883 |
|
T1 |
2535 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |