Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8389813 |
1 |
|
|
T22 |
1308 |
|
T23 |
65470 |
|
T24 |
1 |
| auto[1] |
6253079 |
1 |
|
|
T23 |
52626 |
|
T25 |
196652 |
|
T1 |
40829 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12118467 |
1 |
|
|
T22 |
1308 |
|
T23 |
97263 |
|
T24 |
1 |
| auto[1] |
2524425 |
1 |
|
|
T23 |
20833 |
|
T25 |
76705 |
|
T1 |
16580 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8356555 |
1 |
|
|
T22 |
1308 |
|
T23 |
65906 |
|
T24 |
1 |
| auto[1] |
6286337 |
1 |
|
|
T23 |
52190 |
|
T25 |
200397 |
|
T1 |
42600 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1881815 |
1 |
|
|
T23 |
15139 |
|
T25 |
60531 |
|
T1 |
12639 |
| auto[1] |
auto[0] |
auto[1] |
1265849 |
1 |
|
|
T23 |
10396 |
|
T25 |
37529 |
|
T1 |
8279 |
| auto[1] |
auto[1] |
auto[0] |
1880097 |
1 |
|
|
T23 |
16218 |
|
T25 |
63161 |
|
T1 |
13381 |
| auto[1] |
auto[1] |
auto[1] |
1258576 |
1 |
|
|
T23 |
10437 |
|
T25 |
39176 |
|
T1 |
8301 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |