Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8365330 |
1 |
|
|
T22 |
1308 |
|
T23 |
63251 |
|
T24 |
1 |
| auto[1] |
6277562 |
1 |
|
|
T23 |
54845 |
|
T25 |
200829 |
|
T1 |
40513 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12113526 |
1 |
|
|
T22 |
1308 |
|
T23 |
97565 |
|
T24 |
1 |
| auto[1] |
2529366 |
1 |
|
|
T23 |
20531 |
|
T25 |
74934 |
|
T1 |
16510 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8340891 |
1 |
|
|
T22 |
1308 |
|
T23 |
65842 |
|
T24 |
1 |
| auto[1] |
6302001 |
1 |
|
|
T23 |
52254 |
|
T25 |
197244 |
|
T1 |
43830 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1878177 |
1 |
|
|
T23 |
15419 |
|
T25 |
60896 |
|
T1 |
13469 |
| auto[1] |
auto[0] |
auto[1] |
1261070 |
1 |
|
|
T23 |
9391 |
|
T25 |
37524 |
|
T1 |
8327 |
| auto[1] |
auto[1] |
auto[0] |
1894458 |
1 |
|
|
T23 |
16304 |
|
T25 |
61414 |
|
T1 |
13851 |
| auto[1] |
auto[1] |
auto[1] |
1268296 |
1 |
|
|
T23 |
11140 |
|
T25 |
37410 |
|
T1 |
8183 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |