Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8382235 |
1 |
|
|
T22 |
1308 |
|
T23 |
65888 |
|
T24 |
1 |
| auto[1] |
6260657 |
1 |
|
|
T23 |
52208 |
|
T25 |
197870 |
|
T1 |
36716 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12130910 |
1 |
|
|
T22 |
1308 |
|
T23 |
97584 |
|
T24 |
1 |
| auto[1] |
2511982 |
1 |
|
|
T23 |
20512 |
|
T25 |
74782 |
|
T1 |
14802 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8390987 |
1 |
|
|
T22 |
1308 |
|
T23 |
66802 |
|
T24 |
1 |
| auto[1] |
6251905 |
1 |
|
|
T23 |
51294 |
|
T25 |
196711 |
|
T1 |
38422 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1866352 |
1 |
|
|
T23 |
15055 |
|
T25 |
60517 |
|
T1 |
13323 |
| auto[1] |
auto[0] |
auto[1] |
1259544 |
1 |
|
|
T23 |
9975 |
|
T25 |
37653 |
|
T1 |
8234 |
| auto[1] |
auto[1] |
auto[0] |
1873571 |
1 |
|
|
T23 |
15727 |
|
T25 |
61412 |
|
T1 |
10297 |
| auto[1] |
auto[1] |
auto[1] |
1252438 |
1 |
|
|
T23 |
10537 |
|
T25 |
37129 |
|
T1 |
6568 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |