Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8366599 |
1 |
|
|
T22 |
1308 |
|
T23 |
67046 |
|
T24 |
1 |
| auto[1] |
6276293 |
1 |
|
|
T23 |
51050 |
|
T25 |
199443 |
|
T1 |
39866 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12134129 |
1 |
|
|
T22 |
1308 |
|
T23 |
97013 |
|
T24 |
1 |
| auto[1] |
2508763 |
1 |
|
|
T23 |
21083 |
|
T25 |
76274 |
|
T1 |
14909 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8407835 |
1 |
|
|
T22 |
1308 |
|
T23 |
65953 |
|
T24 |
1 |
| auto[1] |
6235057 |
1 |
|
|
T23 |
52143 |
|
T25 |
201476 |
|
T1 |
37880 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1855512 |
1 |
|
|
T23 |
15818 |
|
T25 |
63439 |
|
T1 |
12053 |
| auto[1] |
auto[0] |
auto[1] |
1252449 |
1 |
|
|
T23 |
10775 |
|
T25 |
38331 |
|
T1 |
7768 |
| auto[1] |
auto[1] |
auto[0] |
1870782 |
1 |
|
|
T23 |
15242 |
|
T25 |
61763 |
|
T1 |
10918 |
| auto[1] |
auto[1] |
auto[1] |
1256314 |
1 |
|
|
T23 |
10308 |
|
T25 |
37943 |
|
T1 |
7141 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |