Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8435686 |
1 |
|
|
T22 |
1308 |
|
T23 |
62582 |
|
T24 |
1 |
| auto[1] |
6207206 |
1 |
|
|
T23 |
55514 |
|
T25 |
195427 |
|
T1 |
38449 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12127618 |
1 |
|
|
T22 |
1308 |
|
T23 |
97708 |
|
T24 |
1 |
| auto[1] |
2515274 |
1 |
|
|
T23 |
20388 |
|
T25 |
75168 |
|
T1 |
15246 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8383719 |
1 |
|
|
T22 |
1308 |
|
T23 |
66311 |
|
T24 |
1 |
| auto[1] |
6259173 |
1 |
|
|
T23 |
51785 |
|
T25 |
197888 |
|
T1 |
40680 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1895127 |
1 |
|
|
T23 |
14557 |
|
T25 |
63238 |
|
T1 |
11951 |
| auto[1] |
auto[0] |
auto[1] |
1268917 |
1 |
|
|
T23 |
9372 |
|
T25 |
37858 |
|
T1 |
7663 |
| auto[1] |
auto[1] |
auto[0] |
1848772 |
1 |
|
|
T23 |
16840 |
|
T25 |
59482 |
|
T1 |
13483 |
| auto[1] |
auto[1] |
auto[1] |
1246357 |
1 |
|
|
T23 |
11016 |
|
T25 |
37310 |
|
T1 |
7583 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |