Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8356056 |
1 |
|
|
T22 |
1308 |
|
T23 |
63892 |
|
T24 |
1 |
| auto[1] |
6286836 |
1 |
|
|
T23 |
54204 |
|
T25 |
199669 |
|
T1 |
39245 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12124292 |
1 |
|
|
T22 |
1308 |
|
T23 |
98245 |
|
T24 |
1 |
| auto[1] |
2518600 |
1 |
|
|
T23 |
19851 |
|
T25 |
77776 |
|
T1 |
15298 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8359426 |
1 |
|
|
T22 |
1308 |
|
T23 |
68064 |
|
T24 |
1 |
| auto[1] |
6283466 |
1 |
|
|
T23 |
50032 |
|
T25 |
205276 |
|
T1 |
38778 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1871746 |
1 |
|
|
T23 |
14051 |
|
T25 |
62506 |
|
T1 |
12017 |
| auto[1] |
auto[0] |
auto[1] |
1255313 |
1 |
|
|
T23 |
9506 |
|
T25 |
38186 |
|
T1 |
7693 |
| auto[1] |
auto[1] |
auto[0] |
1893120 |
1 |
|
|
T23 |
16130 |
|
T25 |
64994 |
|
T1 |
11463 |
| auto[1] |
auto[1] |
auto[1] |
1263287 |
1 |
|
|
T23 |
10345 |
|
T25 |
39590 |
|
T1 |
7605 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |