Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8355163 |
1 |
|
|
T22 |
1308 |
|
T23 |
64059 |
|
T24 |
1 |
| auto[1] |
6287729 |
1 |
|
|
T23 |
54037 |
|
T25 |
203318 |
|
T1 |
41201 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12133431 |
1 |
|
|
T22 |
1308 |
|
T23 |
96901 |
|
T24 |
1 |
| auto[1] |
2509461 |
1 |
|
|
T23 |
21195 |
|
T25 |
75846 |
|
T1 |
15900 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8394877 |
1 |
|
|
T22 |
1308 |
|
T23 |
64865 |
|
T24 |
1 |
| auto[1] |
6248015 |
1 |
|
|
T23 |
53231 |
|
T25 |
199626 |
|
T1 |
41696 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1867729 |
1 |
|
|
T23 |
15690 |
|
T25 |
61437 |
|
T1 |
12184 |
| auto[1] |
auto[0] |
auto[1] |
1258167 |
1 |
|
|
T23 |
10613 |
|
T25 |
36784 |
|
T1 |
7997 |
| auto[1] |
auto[1] |
auto[0] |
1870825 |
1 |
|
|
T23 |
16346 |
|
T25 |
62343 |
|
T1 |
13612 |
| auto[1] |
auto[1] |
auto[1] |
1251294 |
1 |
|
|
T23 |
10582 |
|
T25 |
39062 |
|
T1 |
7903 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |